Welcome everyone to ASML's 2021 Investor Day. I am Skip Miller, Head of Investor Relations at ASML. Thank you all for joining us today. Before I go over the presentation and the agenda of the day, I'd like to first do a little cover logistics regarding first, the Q&A. There's a Q&A session after all the presentations. To submit questions, you'll see a Ask a Question at the bottom of the screen, button. Please select that. You can submit your question. We'll collect those throughout the presentations today. You do not need to put your name and company. If you would like us to contact you should we not get to your question, please include your contact information. Secondly, we do like to continue to improve these events and make them as valuable as possible for you. If you look on the right side of your screen, you'll see a feedback button. Please fill that out. We appreciate feedback. That definitely helps us make improvements in these events. If you go to the agenda, we'll start the agenda off with Peter Wennink. He'll talk about the company strategy and shareholder value. Martin van den Brink will then talk about the industry roadmap and the technology strategy. Next, we'll have Christophe Fouquet who'll come in and talk about EUV products and the business opportunity. We will then take a break. We have 10-minute breaks in here, two of them during the presentations and one before Q&A. Next will be Jim Koonmen, talk about applications, followed by Ron Kool on Deep UV. Wayne Allan will talk about our install base opportunity, and lastly, Roger Dassen will talk about our business model and the capital allocation strategy. Peter will then wrap it up, which should be around 5:00 P.M. CET. We'll have a break and then move to the Q&A session. Before we begin, I would need to remind everyone that comments, you might want to read all this, but comments, reminder when the comments made by management during this event will include forward-looking statements within the meaning of the federal securities laws. These forward-looking statements involve material risks and uncertainties. For a discussion of risk factors, I encourage you to review the safe harbor statement contained in today's press release and presentations, which will be posted on our website at asml.com. Despite our best efforts, unfortunately we could not have you all join us here today, as you would be able to see the major changes that have taken place over the past couple years. Before Peter starts his presentation, we will show you a video of the Veldhoven campus, so you can see some of the changes and expansion underway as we prepare for future growth. For nearly two years, our headquarters in Veldhoven has been more or less closed to visitors, with one clear exception: construction workers. In that time, 700 people worked six days a week to prepare ASML for the future. Our global workforce continues to grow. Since 2016, it has doubled to over 30,000, and now, more than 15,000 people will be based here on the Veldhoven campus. We needed to build more space for everyone, so we took the opportunity to create an inspiring workplace that supports close collaboration and innovation. This new block provides office space for 2,400 colleagues. It has been built to the highest BREEAM sustainability standards, with hundreds of solar panels and natural heating. Employee wellbeing has also been an important factor. Office spaces meet the latest standards in activity-based and agile working. A central plaza provides a place to eat, meet, work, and relax. Our new logistics center has space for 30,000 pallets and is fully automated. The first High NA EUV clean room has been built. It's now getting ready for module assembly and qualification of our next generation EUV systems, with up to six cabins for final integration and testing. Engineers can enjoy a coffee or lunch break in the rooftop garden, which lies above our existing EUV clean rooms. This is where teams are busy working to reduce cabin cycle times to meet the strong demand for our NXE systems. We've also focused on the output capability of our DUV factory, where we've shipped 45% more systems over the last five years. Our new auditorium seats 400 people and can also be split up to accommodate smaller groups. We're introducing more services for employees to the campus, including a supermarket, yoga classes, and sports facilities. We're converting the former logistics area into a park, transforming the heart of the campus into a peaceful green space. In total, we're migrating over 10,000 engineers and adding workspace for over 4,000 employees, including this new building for 1,600 engineers. The main tower has been fully upgraded to activity-based working. We've even optimized the elevators with smart algorithms to reduce waiting and traveling times. There's one thing that hasn't changed: our friends on top of the building, the peregrine falcons, that still make their home at ours. There's more to see. We can't wait to show everyone just what we have achieved on the campus over the past two years. We're looking forward to welcoming you back. Good morning, good afternoon, good evening, good night to all of you. I don't know where you are, but in any case, many thanks for taking the time to listen to us. I'm going to talk about company strategy and some of the value drivers. Just as a recap very quickly, the reason why we showed that video is actually to show you that we're preparing for growth. I think this will be probably the big theme throughout this presentation, not only mine, but also of my colleagues, that it is about growth because there's some megatrends happening, and I will talk about that. It actually means that this industry will grow, and we are prepared. We're not only prepared in square footage or square meters, whatever you want, but also for people. This is a war on talent. We currently employ about 31,000 people, and we'll grow, as I will mention later. On top of the fact that we have these megatrends, there are things happening in the geopolitical space whereby countries are looking for technological sovereignty. It will translate into more demand for wafers. That means that customers will invest in wafer capacity. It will also mean that technology push will continue. Lithography intensity, we think, will grow. That's also logical. As we all know, we introduced EUV and has hit high-volume manufacturing last year. All in all, after that, we will of course deliver growth and increased stakeholder value, shareholder value, but definitely also ESG value because we do believe that ESG has become and will become an integral part of our strategy. Let me start. I will first talk about the end market demand the way we see it, but not only we see it, but it's also based on what we discuss with customers, what customers say, and what industry analysts say. I'll talk to litho market, our strategy, and about sustainability. Okay. I always like to use slides of customers. This is an Intel slide because it actually reflects how they think about the world. We actually depend on the views that our customers have. It's very much in line with how we see the world. We have the cloud, 5G infrastructure, artificial intelligence, and then the edge, the edge computing. I'll come to that on the next slide. Of course, you know, the virtual and the augmented realities and the gaming. I think that then the next slide, this one I really like. It's a bit busy. It's from Qualcomm. What it actually shows is actually how we think about the world. We have the cloud, which increasingly, also we as a company, are actually using the cloud more and more as a cost-effective way to store data and to conduct business. Then we of course have the right-hand side, which actually you can see is a significant network of solutions, and I call it distributed computing solutions, distributed storage solutions. Now when you look at the icons, you see smart traffic systems, you see surveillance systems, cameras, automotive self-driving cars, consumer personal, you know, appliances, industrial appliances, robotics, the energy infrastructure needs to be upgraded. Of course, it basically evolves around the smartphone. In between, you see 5G. 5G is this big pipe that actually helps us to basically transfer all the data back and forth into the cloud. What is the significance of the right-hand part is that many of these applications are mobile and are driven by sensor technology. The sensor technology, picking up the analog data needs to be transferred into digital, and because it's mobile, we need power. We need sensors like image sensors. We need microcontrollers. The significance of that is that it doesn't need all 7 nm. On the contrary, you want to keep the computing very close to the sensors. That means that the computing is really the distributed computing. A lot of the distributed computing is about mature technology, and that's what we're seeing today. This explosion of tens of thousands of companies trying to create new services, new products, creates the demand for mature technology. 28 nm, still advanced, but 45 nm, 65 nm, 90 nm, 180 nm, and even i-line, everything is in significant demand today, and it will keep going. This will grow further because if we think about the enabler, 5G, being able to capture it and to transfer it to the cloud, and we think about 5G, then we've just started. We think by 2026, global 5G subscriptions will be 3.5 billion, and we'll then need an investment of approximately EUR 150 billion. It will grow further, and by 2030, this will have grown to EUR 250 billion. We're just beginning. That means that when we look at this decade, and also we look at this distributing computing drive, that the need for solutions, advanced solutions and mature solutions and storage and a performance memory will just keep growing. We've just begun. Now, when we go to data like it's always interesting when you look at the size of what we can expect, you know? Today, you know, estimated 40 billion connected devices, which by the way, when we were in 2018, we actually estimated that to be 25 billion. Now we think by 2021, today, it is 40 billion. With the growth rates that we're currently looking at, it's gonna be 350 billion devices connected, which will create massive amounts of storage, yeah? It is needed. Now, why do I think this is an important slide? I show this slide more often. Actually, when there's such a significant demand from the outside for, for growth in the areas I just mentioned, then we have an ecosystem that actually starts with us, semiconductor manufacturers that actually we sell to the semiconductor makers, and they sell to the hardware makers, and they sell to the platform companies, to big tech. When you look at the earnings power of that ecosystem, was last year close to $500 billion, with a growth rate of, over the last five years, about 14%. There's no reason, because of what I just said on the previous slides, that there is any reason why that would go down. This will continue. This ecosystem with that earnings power have very strong incentives, but there's going to be a lot of competition, and it will drive innovation. This innovation will also be driven by these big societal issues that we have. The big societal challenges face massive problems, and innovation needs problems. There is no innovation without problems. If you have no problem, why would you innovate? The bigger the problems, and those problems are significant when you think about the energy transition, when you think about the digitalization happening everywhere, we need solutions. The industry is able to do that, and the earnings power is there. On top of this, and I mentioned this before, we have this drive for technological sovereignty. This is just a snippet of the headlines. If you translate that. Sorry for that. If you translate this into specific programs that governments have actually announced, and you add it all up, you take the U.S. with EUR 52 billion, you take the EU, that hasn't been specific, but they basically said, "We expect private and and public investments in the semiconductor industry to be anywhere between EUR 24 billion and EUR 35 billion." Let's take half. That's another EUR 15 billion. China has announced EUR 80 billion. On top of that, we have Japan and Korea also adding to this. If you add it up, there is this annual CapEx that we're looking at, EUR 150 billion for the industry. There are governments that are saying, "We will make available another EUR 150 billion." Adding these two up, it's clear that people start talking about what will this lead to? This lead to overcapacity? Cyclicality. Yes, we do agree that potential is there, but we also need to realize two things. One is that this industry, our industry, we and our customers, have structurally underestimated the capacity of the industry needed to support all those innovations. Everybody knows where we are today. We have a structural undercapacity in the semiconductor industry. We're bad at assessing the growth rates. Not bad because we think it's too high. I think we structurally are bad because it's too low. Okay, we will also use this, what we know today, as the, as, the basis of what we're going to tell you, in the rest of these presentations. On top of that, you can expect that the expansions which will happen geographically, will not be done by dozens of companies. There's only going to be a few companies that are going to do this, our very large customers. No matter how you look at it, they're going to be rational. Yeah. And yes, market shares are still up for grabs, but, you know, over time, it will become clear, yeah, who will win and who will not win, and there will be adjustments. I'm positive. I'm positive on the fact that there is enough capital, there is a drive, there is a political drive, there is an industry drive to grow, this will help. Yes, we will probably have some cyclicality because it's not going to be concentrated in only a few geographical areas. It's going to be spread around the globe. It's going to help us as an equipment industry. I agree with that. That is my conviction. It will be controlled. When we look at the semi end markets, and we just look at the growth rates over the last 10 years, and we extrapolate to 2025, our customers grow about 7% CAGR. That's spread over, let's say, seven key segments, which starts with the smartphone, between 6% and 7% CAGR. When we go back to 2018, that was a different number. It was lower. Yeah, the rollout of 5G and everything that's happening in distributed computing, it's not strange that it will actually grow faster. Which is also true for consumer electronics and for personal computing, which, if I remember well, in 2018, it was flat or even minus. This will have its effect on the wireless infrastructure and on service and data center and on storage. The two double-digit growth areas are automotive, which is very clear with the electrification, the advanced driver-assisted systems, and also in industrial electronics. We see it. We see, you know, our the over-the-shoulder support that we need to provide to our customers. It's all digital. Now, of course, the two big items here are the data centers and the servers, you know, estimated to be close to EUR 190 billion by 2030, and the smartphone market, around EUR 210 billion. These are the two big markets, but the growth, the double-digit growth areas are automotive and industrial, and we believe so. We also see no reason why this CAGR of 7% shouldn't continue, which if you then do the calculations, will come very close to the EUR 1 trillion that has been mentioned several times in some industry analyst reports. Now, what does that mean in terms of wafer demand? For logic and MPU, the advanced nodes, the lower than 28 nm, it's almost a 10% CAGR from 2020 to 2025. DRAM, about 5.2%, and NAND close to 6%. If you look at the wafer capacity growth, we believe that between 2020 and 2025, the wafer starts per month growth will be about 500,000, which compounds to a CAGR of more than 5%, and it's split, as you can see here, in NAND, DRAM, advanced logic, and mature. It's about 100,000 wafer starts for NAND, about 80,000 wafer starts per month for DRAM, and about 125 for advanced logic. I look at mature, 200,000 wafer starts, and that goes back to what I said earlier when I talked about distributed computing. Of course, the CAGR is lower, it's close to 4%, but the size, as you can see in the graph, is significant. That's a big change as compared to 2018. Okay, what about the lithography market? Well, it translates into this. On the left-hand side of this graph, you can see when you look at the estimate that we had in 2018 for the growth rates, 2017 to 2025, we thought the semi-end markets would have a growth rate of about 4.9%. Now, that's 10% higher. It's about 5.4% now, that's what we think today, which also has an effect on the semi CapEx, because we need more wafers. I think it's clear from what I said before, when you add the, let's say, the underlying structural secular growth of the industry on top of what we believe is going to be a drive for technological sovereignty, the semi CapEx will not be 3.5%, it will be closer to 6%. It also has an effect on litho CapEx, because litho CapEx will then grow because the litho intensity will increase. Of course, with the introduction of EUV and the focus on advanced, you know, nodes, as you could see on the previous slide, almost a 10% CAGR, it is not strange that also litho intensity and litho CapEx will be bigger. I mean, this is the data that we have collected from WSTS, from Gartner, from, you know, VLSI, SEMI, but this is what the market seems to believe, and we believe it too. What does that mean? It means that when we look at the distribution of our technology, by 2025, about 67%, 68% will be EUV, and the rest will be immersion and dry and metrology and inspection. This 67% is less than we said. It's a lower percentage than what we said in 2018 on 2025. It doesn't mean that the EUV market has shrunk. No, as a matter of fact, it has grown. The immersion market and the dry market, for all the reasons that I mentioned, has grown even faster, which is good because it actually means that our litho market will be bigger in 2025 than we initially thought, and Roger is going to talk about that. Now, what does it mean? If we need to ship all those machines to make sure that we can supply our customers with enough wafer capacity, we need to do something. We need to add capacity, both in Deep UV and in EUV. In the end, we sell machines, we sell units, but what our customers are buying is wafer capacity. When you look at DUV, we think we will increase wafer capacity between 2020 and 2025 in Deep UV with a factor of two, which means 50% more units. Last year, we did closer to 50 units, 50%. On top of that, around 375. In EUV, we're going to double number of units. 2020, we had about 35 units. Double, about 70 units for 2025. Also, we will increase the productivity. In Deep UV, we will bring our dry products, and Ron will talk about this, to a more productive platform from XT to NXT. In EUV, Christophe will talk about that, you will see in the roadmap several versions of the EUV products that will have higher productivity. There are a couple of drivers. First of all, we need to build faster. We have the cycle time reduction. We are currently planning between now and 2025 a 35% reduction of cycle time. In Deep UV, another 10%. We are already pretty fast. I mean, we can make a KrF XT tool in five weeks here in Veldhoven. Yeah. But there's still some room for improvement. Of course, there are more people. We need more people, yeah. We have 20% growth in our people to support the 2025 operations and expansion of capacity. We need to also increase the production space, not only with us, more important in the supply chain. For us, I think we can stay within the square meters or square footage that we have. We have a new logistics center, as you saw in the video, so we can use the current logistics center to build more cabins. Basically, we're in the same square meters, we're just going to expand our, you know, production capacity. Of course, the productivity of the machines. Between 25% and 60% higher productivity, which of course translates into value of our tools. Now, just to wrap up on this part, this is a VLSI Research slide which they've published not so long ago. Actually, it shows a potential for the semiconductor industry to grow to EUR 1 trillion, and for the WFE, the wafer fab equipment, to grow to EUR 150 billion. Yeah? If you look at the growth rate, if you just extrapolate the growth rates that we just saw, we come to very similar numbers. That's on the lithography market. Like I said, Ron, you know, Christophe, Jim, but also, you know, Wayne are going to go into more detail on the Deep UV market, the metrology and inspection market, EUV market, and our installed base business. On the strategy, let's go back to 2018. 2018, we had four key elements. We said, we need to concentrate on holistic litho expansion, which are basically driven by gain leadership in what we call in-device metrology, basically focused on the correction of issues that we see in overlay, and the pattern fidelity control, which combines e-beam metrology and the other metrology solutions that we have. What did we do? We delivered a new suite of YieldStar products, and our e-beam products, eP, the eP5 products, and we focused that on extending EPE control. That's the Edge Placement Error control. We delivered the first multibeam tool, and we'll see that, what we are now saying for 2021 in our strategy, we will continue doing that. On Deep UV, clearly we had to continue in innovation, but very important for our customers, these are mature products. We have to drive costs down, improve uptime, and also make sure that our installed base business will be expanded because our installed base will grow, and we need to expand that installed base with decent profitability. What did we do? We introduced NXT 2000, and NXT 2050 in volume manufacturing, we actually brought our first dry Deep UV product onto the NXT high-performance platform. Ron's going to talk about that. On top of that, we are at record numbers for uptime, and our quality performance keeps going up. On EUV, focus was on EUV in the, you know, industrialization, make EUV HVM. What we did, we pulled in the 3500C and the 3600D, and we introduced it in both Logic and in DRAM, and we started to execute on our new service model. With High-NA, we have to enable High-NA for the then 3 nm logic node, Christophe will give an update there. The facilities are in place, you saw it in the video, the first modules are in preparation. What are we going to do now? First of all, on top of these four items, we have to strengthen the customer trust. It's absolutely essential, as you see it today, that our customers completely rely on our execution capabilities. If you would call up a customer today and say, "Are you satisfied?" Say, "No, because we cannot get enough machines." We need to extend our capacity, drive down cost, and make sure that we have very robust products. We have to make ESG an integral part of our strategy. In holistic litho, we have to build a leading position in Edge Placement E rror, which is basically the combination of YieldStar and e-beam products to control and, you know, monitor the Edge, the Edge, you know, Placement Error. On Deep UV, keep doing what we are doing, extend the capability and the capacity, also the shipment capacity of our Deep UV products, immersion and dry, and move dry onto a high-performance platform, and that's the KrF platform, which is in very high demand now, move it to the high-performance platform. On EUV, we're in HVM. We have to bring EUV as quickly as possible to the performance metrics that we have at, in the field at the customer for Deep UV, which means we have to execute on the roadmap in terms of productivity, reliability, and productivity increase. On High-NA, we have to absolutely do what we set out to do, and that's bring High-NA to HVM in 2025, and all the ingredients are there, and Christophe will talk about this. Now, on sustainability. We have to go back. I think it's an important issue in the company for our stakeholders. I mean, our people talk about it, our customers want it, our suppliers want it, our shareholders want it, and our society, the community wants it. We have to go back to our purpose. Our purpose is to unlock the potential of our people and society by pushing technology to the new limits. Digital technology will help. It will boost social progress, but also will help in energy efficiency and reduce the global emissions by 15%. You can think about working from home. You can think about smart industry. You can think about agriculture, sensor technology. There's a whole list of areas where digital technology will help. Our vision is also to develop lithography tools that will help our customers to produce energy-efficient but very high-performance chips, which reduces the energy efficiency or increases the energy efficiency every two years with a factor of three. We think we can do that together with our customers. Also we'll help our customers to minimize materials and lower energy usage that is required to, you know, produce those advanced microchips, which means that we also need to look at the energy performance of our tools, which we will. We will drive our roadmap to 2025 to net zero, but also we will collaborate with our suppliers to drive to net zero by 2030 and for our customer base, help them and collaborate to drive to net zero by 2040. If we then look at our ESG strategy, we had five blocks until now. We have now nine. We actually extend it with, I think, something which is important, an attractive workplace for all, which is also focused on diversity and inclusion. An innovative ecosystem, extremely important for us because we're a system engineer. We're basically a system architect. We're a system integrator. We completely rely on an ecosystem, where innovation is absolutely paramount. You will also see us focusing on startup, scale-ups, but also on innovation in our current ecosystem, which we'll do together with a responsible supply chain, which we will actually hold to the same standards as we have. I think we want to be more recognized as a valued partner for our, you know, community. That's the S in ESG. On E, on environment, we keep doing what we are doing now, but even put more effort behind energy efficiency and the climate action. I'm going to talk about that in a minute. Of course, the circular economy. We have to reduce waste. There's even in our company, or also in our company, waste, which we can take out of the system. Having said that, we think the G of governance is very important because when you think about these areas, environmental and social, where we put our focus, it is about integrated governance. We need to be part of our integrated strategy. Yeah. That is for all stakeholders. It's for our people, it's for our shareholders, it's for our customers, suppliers, and for the community. We have to do that by being very transparent in our reporting. That is extremely important that the Science Based Targets initiative that we will align to. We will align to it, and we have a target to do that by the end of the year. Having said that, quickly go to the climate actions. We look at Scope 1 and 2, it's our manufacturing and our buildings, we have 0.015 megaton CO2 per year. That's a 2020 measurement. By 2025, we'll be net zero. On business travel and commute, we have a target to be net zero by 2025. We do that by reducing energy, using less energy, but also using green energy. We will compensate the remainder. The focus will be on Scope 1 and 2. To reach the net zero, we will have the compensation of the, you know, emissions as part of the solution. When we go to suppliers, by 2030 through supply chain collaboration, this is really about collaboration. We have a target that by 2030 we want to be net zero. I'm positive there. Many of our key suppliers are actually with us in Scope 1 and 2, so if everybody's with us in Scope 1 and 2, we'll be at Scope 3. With our customers, we need further to collaborate to be net zero by 2040, which is also the desire of our customers, and you will see increased collaboration on that front. Is that recognized? Yes, it's recognized currently by the rating agencies, but it's not enough for us. We want to be top class when we present these charts, and when you look, for instance, look at the last row, CDP. Yes, we have to improve there. That has to do with basically the analysis on the impact of climate change. We need to step up there. We will step up there. We will report on it. We are in areas where we haven't suffered from climate change effects, but we will improve there also. The key messages, I'm going to repeat myself, hopefully, you will recognize this when we go through the presentations that are going to follow. The megatrends, I hope it was clear. Megatrends are there. They will continue, they will support our compound annual growth rates. Countries will also step up and will support the growth of this industry because they're now finding out that semiconductors are as important, even more important than oil. That translates into higher wafer demand, into higher litho intensity, for which we need to build capacity together with our supply chain. That means that we will provide value to our shareholders and to our stakeholders. We'll integrate our ESG targets as an integral part of our strategy. That's my part. Thank you very much for your attention. I'd like to move over to Martin. Thank you. Peter, thanks. I will focus on the technology strategy, both how Moore's Law is perceived to move forward in the coming decade, as well how we respond to that in our technology. I'd like to summarize at start, to state that Moore's Law is alive and well, fueled by system scaling, which then also means that semiconductor scaling continue to be part of our business, our customers, in support of the never-ending need of data exchange. Our customer roadmaps require continued shrink, which we have to respond on edge placement and affordable scaling. We do this in a holistic way, by not only driving the individual stepper performance, but also the whole little cluster. We have a holistic portfolio, and we align this with our customer roadmap, and we are preparing also moving forward to go to the next level of EUV we call High NA. We continue to execute all of this following our strategic priorities with a increased focus on cost effectively and sustainability. I like to start with the evolution of Moore's Law and our customer roadmap. I start with a bit of a complicated pictorial, which is more or less showing the coming 10 years' device innovation as being depicted by imec. Where we are today on FinFET at the 3 nm node, we move to nanosheets or Gate-All-Around. We're going to various versions of that nanosheet, going in the end to below nanometer to atomic channels. This is to say that the device itself has a substantial movement of improvements moving forward. However, as been shown by Mark Liu earlier this year in his presentation, I copied the slide of him, the innovation is not limited to device level. You see here major innovations as labeled by the amount of transistors on a on a single system on a chip level as well as system level. I remember three years ago, I introduced with you what I call the four engines, and the four engines, you can also look at this picture. You can recognize the four engines. It's about device scaling, mainly done by foundry and their supply chain. Circuit scaling, which is mainly the foundry customers, and the foundry's dimensional scaling is the litho supply chain, including customers, as well as architectural scaling, which is mainly done by foundry customer. You see here the orange dots is where we are actively, mainly on chip level. If you go back in history and look to Moore's Law evolution, my starting point is around the mid-1970s. You see here that the clock frequency of chips has been steadily increasing until around 2005, where the clock frequency stalled. When it comes to litho density, dimension of contact poly pitch times metal pitch and transistor density, those has to continue to scale up to today and continue to scale the coming 10 years. However, since the clock frequency is scaling, we have to look to a different metric to show the performance progress of chips. Mark did his presentation by introducing the concept what he call energy-efficient performance, which is in fact the amount of operations per seconds divided by the energy per operation. On a single device, it's about the clock frequency divided by the switch energy. Using the Dennard scaling model, which was the scaling model which was being used in our industry prior to 2005, you can say that if you scale the density, the with k, your energy efficiency performance would scale with k to the power of four, which means if you're 2x per two year density scaling, the energy-efficient performance scaled 4x for every two years. You see this listed on this slide. You see a very aggressive improvement up to 2005, which is gradually slowing down, dominated by the stalling of the frequency and still increasing because of the dimensional scaling. However, as Mark showed in his presentation, he is not looking to dimensions. He is looking to what he called energy-efficient performance, as just explained, which has been increased with a tempo of 3x per two years since 2005 to today. Moreover, he believes that this will continue to scale for the coming 20 year, which is a very strong prediction. That is in itself a major fuel for the semiconductor moving forwards, in terms of pulling new applications and more calculation-intensive tasks. If I plot now the system graph in my plot, you see in this animation that I normalize this graph from Mark, where the 2005 device scaling stops. As you can see, system scaling took over since 2005, mind you, that this is 15 years ago. We see the system scaling takes over and continue to go strongly to 2040. I did not have the guts like Mark predicting what scaling will do for the coming 10 years, and I like to limit myself to say for the coming 10 years, we'll see substantial scaling taking place. An example of scaling has been given recently by Lisa Su from AMD, which gives this 3D chiplet integrated package with a 3x performance reduction and a 4%-25% speed reduction, which is overall giving you a 4x energy efficiency performance. If you now take this graph and translate what it could mean for ASML, I go back to this little density graph and reverse it, as you see here, and I put it on a logarithmic scale, and here you see the logic metal pitch, which is the smallest pitch in logic. And I then take also the Edge Placement Error, and the overlay as part of it, and the node name, as you see going down to 2013. As you see that the edge placement and resolution continues to go down, and you also see that the overlay and the OPC goes a bit more aggressive to allow more space for the other errors in our customer budget. All of our roadmap here is being highly based on this projection. As you appreciate, the previous story is very much focusing on the logic. On memory, however, tapping into a slide of Seok-Hee Lee from H ynix, who gave a excellent presentation in March, who did make a prediction of DRAM to scale down below 10 nm in the coming 10 years. For NAND, a similar aggressive scaling. However, DRAM is more of a dimensional scaling, and in NAND, we're talking about layers, where we today are a bit short of 200 layers is the most advanced NAND chip. That will scale another 3x the coming year with all kind of consequences on the manufacturing infrastructure. That being said, we can project the amount of lithography layers by technology in logic, DRAM, and NAND. You see that the color code is in the various technology we're providing from i-line, krypton fluoride, dry systems, immersion systems, and EUV. You see that as we're progressing from the 5 to the 1 nm node, we see increasing use of EUV and increasing use of High-NA. For DRAM, this is kind of flat, and for 3D NAND, we see litho intensity goes up because you have to restart litho several times in a stack when you grow the number of layers. If you look this from a bit of a distance, zooming out a bit, you see that the need for DUV is increasing on a per-layer projection. This is not taking care of the volume part. EUV layers are increasing, but over time, also subdued by introducing of High-NA will replace multiple EUV layers. This has been used later on with Roger and into the overall modeling of the business. Sorry. That means for our semiconductor roadmap, I think we are very bullish on the continuous decade where system scaling of our customers fuel the need of advanced semiconductors, where the shrink being litho is an essential part of it. That needs us to drive the litho performance at lower cost and higher productivity. We need to continue to have a trusted relationship with our customers with very strong holistic products. That being said, let's go to our strategic priorities. Peter already talked about it. I will not elaborate on this. It's in fact the four business units which are gonna be talked later after me. I put there also an overarching priority, which I call customer trust, where we need to be able to deliver performance at cost, robust, and also in a sustainable way, which I like to close. I'd like to start with our holistic approach. If you look to our research proposal, there's not much change on this holistic diagram for the last, let's say, 15 years or so. You see that the slide is slowly evolving, where you see in the top, we continue to be strong, and we aim to be strong in the litho equipment. On the left bottom, you see the computational part. On the right bottom, you see the metrology part. You see the triangle is not only going to traditional litho parameters like overlay and focus, but also edge placement and defects becoming increasing role, as well as the control products between computational and the platform in terms of improving the process window, the process window control, as well as the metrology on the bottom. I will discuss this triangle in more detail in more or less three main topics. We'll start with applications, then with DUV, and then close up with EUV and High-NA. Our application strategic directions are listed here, as will be also detailed out by Jim. We'll focus on nanometers. That means more accuracy, more control, more good wafers per day, per dollar, and then fast time to yield. We do that by our products, by having higher productivity metrology. And alignment, as well as more robust alignment and metrology schemes. We are driving e-beam solutions to get to better process control, process capability. We are focusing on defects, and for that we are developing a new house of product called multibeam. We are enable more measurement at a fixed cost to allow the opportunity to control a little better. We're going to have a faster time to solution via our computational litho capability for more accurate OPC using all kind of techniques. I'd like to pick out one, which is our e-beam solution. You see here on the horizontal axis the defect size. Vertically, you see the productivity. You see the green line is the single large field e-beam systems, where you see that in the defect size of interest today between 10 and, or today and in the future between 10 and four, we see the optics runs out and we could use e-beam. However, the productivity is pretty grim with single beam. In fact, to translate the wafers per hour, 1 wafer per hour is around 7,000 mm sq per hour. That's up, higher up in the table. However, we continue to enjoy the e-beam by doing mainly today also the OPC calibration through machine learning. We need a faster horse. For that, we're introducing various generations of multibeams. This looks a very long roadmap, but we are determined to get to in the wafer per hour detection speed by innovative solutions in e-beam. This is what we need to do. We're rolling out as we speak today our first generation, which you see has a substantial, almost an order of magnitude increased productivity to our single beam tools. If you look into our roadmap, it's pretty rich. I'll leave the details over to Jim. You see here the scanner control is a major picket where we have more sophisticated control knobs on the scanner to be accessed by the application products. Fueled by metrology, both optical and e-beam, we have inspection and OPC. The top is the scanner control by more sophisticated interface for both DUV and EUV and EPE control. For optical metrology, our YieldStar, fast stages, multiple wavelengths, in-device metrology. For e-beam, single beam high resolution, large field of view, and massive metrology. For inspection, we're counting on multibeam going to the next level of productivity. Finally, but not last, is our OPC products where with the extended capability on metrology, in particular e-beam metrology, we are increasingly using advanced machine learning algorithms to be safeguarded by model innovations to drive the OPC accuracy, which also drive our holistic platform and allow us to have a more and better optimization of our stepper production. With that, I'd like to move to DUV. I'd like to start also with the new product we shipped since late last year. What you see here is the ramp-up capability of our newest immersion platform in the first half of this year versus the previous model. What you see that we have been able to get a faster ramp-up, mainly also driven by higher availability while improving still the overlay 20%. This is a bit summarizing all the importance of our DUV that we have here the need of a combination of system maturity as well as still performance improvement. You see that reflected also in our strategy here. It's an overlay productivity, which are traditional litho parameters. We also have to do more install base where Wayne will elaborate later on in this program. New markets where we are also developing products for special applications such as thin film head. We have to work on sustainability and reuse parts and reduce cost. The productivity is mainly done by an overall cost, overall platform commonality, as I will show later. The product roadmap is still a busy roadmap where we are still innovating on all wavelengths. As you can see here, almost every wavelength has almost a dual use, a critical and a less critical system, both on immersion and dry. You see that we continue to drive the overlay imaging and productivity on XT as well as cost down. We also did it by argon fluoride by merging the argon fluoride system on the immersion platform, which gives a boost in overlay and productivity. We are planning to do the same on krypton fluoride. This has been planned around and early in the course of 2022. We will port the krypton fluoride models as well on our NXT platform. We will drive the productivity to 300, over 300 waves per hour with an opportunity to even go to 400. Then again, the i-line platform continue to be an important element in our product offering. We also will make major forward commitment to make sure that our productivity on i-line is continue to keep track to our customer needs. With that, I like to go to my last element on the products, which is EUV. When we talked to each other in 2018, we were coming just out of the, how you call it, the dark ages of EUV, so to speak, where we were sub-500 wafers per day performance. We're able to double to triple that in 2018, so we were very much relieved. As you see today, in the last three years, we're able to double to triple that again. This will likely be a never-ending story to make sure we stay in check with the cost of EUV as well as energy use. You see it's not to a small part. This has been driven or been fueled also by our level of perfection of operating this complex machine, where today availability between 85% and 90% are common. As we say, we like to bring this in a few years at least to 95% and another 50%. We probably will not have the 2x and 3x gain we have seen the last few years, but we still drive aggressively the productivity moving forward. What is our strategy there? Again, nanometers, the first time I put it very dominantly, I think the EUV will carry the leading edge of our customer products. Productivity, 'cause it's the most effective way to drive the cost down. We have to also look to here good wafers per day per dollar invest, which means we have to drive high yields, enable high yields, by supporting less multiple layers and reducing cycle time. We do that in a stepper. Main two elements here is getting the defects down, which is a very important element of our EUV offering, where we are in a vacuum environment where we have to learn again the defect game, both on mask and wafer, where we have to drive that down to the next level as well, and this is more an objective on the longer term. We are going to drive to over 200 wafers per hour in 97, and we do that in a way to focus an improvement on the source, the mirror, in particular mirror heating. We have to temperature control them. Super fast stages in both reticle handling and wafer handling and robust alignment, and this element is again synergistic with our DUV folks. However, if nothing would be done by ASML, then process complexity is doomed to increase, in fact, doomed to explode. We have seen that in the recent past, where on the left-hand side, the immersion systems were doing the majority job, and every time you have to shrink, you have to add additional layers. The vertical axis here is a bit, how you call it, normalized in arbitrary units. I call it process complexity with amount of mask cycle time. Horizontally, you see the node. At around 7 nm, customers were forced to make the shift. Intel has been very vocal on this on their particular timing. On EUV, they may have done it a bit later than they would have liked to do it, but you see here a major simplification in EUV. Moving forward, this will repeat again if nothing will be done. You see the 0.33 will continue to increase the process complexity, but also today, double patterning EUV has been done, and there the High-NA comes in around the 2 and 1 nm node, where we also project major simplification. Rather than me going through the details, let's say, "What's the strategy here?" Again, it's 1.7 nm are smaller features, 3x increased density. It allows 40% in CDU. It has 50% patterning saving cost by replacing double patterning, higher yield because of 33% less mask. We're doing this with another major technology boost, and where we try to minimize the effort, because this is still a very significant effort, by driving maximum commonality within platform and also focusing on this complex machine on maturity and serviceability. Rather than just going into the details of High-NA, I'd just like to show you the hardware floating around at our suppliers and our factory, where we see real stuff is coming in, and we are probably at this point in time at the more in between way. We have finished the design, and we need to start the integration and qualify and optimize the system moving forward. That brings me to the EUV roadmap. You see in the top here the 0.33 driving up over time after 2025 to also 200 wafers per hour. The same for High-NA and starting in 2024. You see also the customer timing here, where we allow early access of our tool on our premises, integrated with imec, and the customer R&D will start in 2024 and high volume in 2025. Which also means that also moving forward, High-NA and EUV will innovate together in a sensible way. Now let me end up with saying a few words what I call trust, you could have a lot of words on trust, and I will pick a few out of it. The one I like to pick out is the commonality. Commonality means you are providing all your platform the same level alignment sensor, level metrology, wafer handling, so there's a common face to the customer on a number of key elements, but also reducing the R&D and also leveraging each other performance. Every time you make an improvement on the alignment system, it will be implementable in DUV and EUV. DUV commonality. Within DUV, we have launched 10 years ago the NXT platform. We have not yet rolled it out through all platform. This slide suggests we are gonna take a complete rollout of all of our DUV products on all platforms, which also means that we will gain a cost advantage and also serviceability advantages by working towards common platform, but also drive the performance on DUV up to the next level. Finally, but not least, the commonality between High-NA and Low-NA is extremely important. In fact, as you saw me in the previous roadmap, we are driving to over 200 wafers per hour, and we're using common modules like the source, like the wafer handler, the reticle and wafer stage, to get us to get maximum progress on both platforms driving cost down. The second example is about how we define good wafers per hour, per day. On the left-hand side, you see the traditional service model we have today, and Wayne will elaborate on that, where today we are on Deep UV up to 97% uptime. That 3% downtime is what we call a so-called semi-defined downtime. However, in reality, the effective downtime can go up from 3% up to 10%-15%, because certain actions not defined as downtime, but customer's requalification, customer specific spec tuning is not including that. What we like to do, we like to gain trust of a customer to a level we can team up with him on the bigger part of downtime and then drive that down to the next level to, say, the 90%-95%. Wayne will elaborate it. Finally, energy. It has been positioned EUV is a large energy consumer, which it is. If you look to the amount of energy being spent on a wafer, then you see that EUV compared to 193 on the left-hand side, given the double patterning nature we use on 193, will up to 45% reduce cost. You see here the cost reduction is depending a little bit on the productivity. At 100 wafers per hour, the productivity is less. Particularly when we drive to the 220 wafers per hour on the end of the roadmap, we have up to a 45% energy saving per wafer, although the machine itself will consume more. On High-NA, you see a similar analysis between High-NA and Low-NA. High-NA could drive up to 46% over time energy usage. Although the energy usage is higher, it's still substantially less than continue to have 0.33 at double patterning. With that, I like to conclude, and I will not repeat as on the slide. We have a very solid roadmap for the coming 10 years. We are, as I try to share with you, energized almost all business units from DUV to EUV to applications because the continued shrink, which continuously needed will require substantial innovation on all of our platform. Thank you very much. Good morning. Good afternoon, everyone. I'm Christophe Fouquet, and I'm very happy to be able to discuss some of the key points, key opportunity point already been made by Peter and Martin on EUV. First, a few key messages. As Martin mentioned, we believe that we have left this dark age, and EUV is now basically one of the key product to extend our logic and DRAM customer roadmap. We do so by continuing to provide lithography resolution, overlay, but also productivity and cost down. As you know, today, our customer are using EUV, both in logic and in DRAM for high-volume manufacturing. What we also see, and we'll talk about it, is that we expect our EUV layer adoptions to continue to increase both for logic and for DRAM. We talked already a lot about the demand that we have to meet basically in the coming years. What I will explain you is that when it comes to EUV, we're going to drive both the number of tools we can ship every year, but also our productivity in order to meet our customer demand, but also be able to continue to provide cost advantage year-on-year to our customer. EUV is becoming a very important part of our roadmap. I think Peter showed you that by 2025, we expect EUV to be about 70% of our business. As such, we are developing a very comprehensive roadmap, both for our existing platform, where we expect basically to continue to release every two years a new tool in order to meet our customer expectation. Also where we start to look at introducing High- NA at the horizon of 2024, 2026. This, as Martin explained, will be a way for us to continue to provide very advanced solution to our customer. Finally, we'll talk a bit about profitability. As you know, we have made a lot of progress in the last three years, both on the product, but also on service. Our roadmap, our improvement on productivity, on overlay imaging performance will continue to fuel this profitability improvement. If we start, I will talk first about EUV in production and the adoption. I think it was very difficult to start this presentation without talking about customer. Martin, Peter have both explained how it is important for ASML to continue to earn our customer trust. To be honest, when we look at EUV, they have been formidable partners, and without the people mentioned on this slide, TSMC, Samsung, Intel, Micron, SK Hynix, I think that EUV story will be very different. These are a few examples, of course, of their public statement about EUV, explaining every time that EUV is in production and becoming a very important part of the roadmap. For us, it's also a reminder, I will say on how important the partnership we have developed with them is going to continue to be important moving forward. The second slide you have seen already, Martin has shown that, you could ask yourself why to show it again. I think the reason for that is that this is the key to the past success of EUV in the last few years, but also the future success of EUV. Improving productivity, which is the curve you see in blue in the background, is a way to continue to improve, I will say, the economics for our customer, and we have a very aggressive roadmap to continue to do that. Availability is predictability. When we'll talk about this later on, when it comes to service, it is critical for our customer to be able to rely on our machine. Today, we are looking at about 85-90% availability. As Martin mentioned in his presentation, we are still fully engaged to go far beyond 95%, and we're also fully engaged to continue to increase the wafer per day output. We'll talk a lot about new products, but I think we also want to make clear that when it comes to our install base, which is growing more and more, and again, when we'll touch on that, we're also fully committed to make sure that our customer get the very best out of it. If we look now at the adoption, we believe, as you see it on this graph, dark green is memory, light green is logic. We see and we believe that our customer will continue to use more and more EUV. The reason for that, as Martin has explained, is that they want to continue to drive their roadmap aggressively, and the only thing that could stop them is complexity, because complexity results in yield issue, very long cycle time, and I will say in some way threaten the economy. We are going to see, we believe, more adoption, which as a result, and you see it on this curve, will result into a lot more wafer exposed on EUV every single year. Again, here light green is for logic, and you are looking here not at accumulated number, but really at a number of EUV wafer exposed every year. Dark green is memory. The question of course for us has been how do we make sure that we deliver on this need? We can never be in a position, of course, where our customer will not be able to basically deliver their own output. How do we do that? Two ways, and Peter already alluded to it. The first one is of course increase the capacity of our factories. We are going to do that. I think Peter mentioned that we're going to double basically our output between 2020 and 2025. The other element, which is also very important, is the increase of productivity, what you see here is that the productivity will also increase almost by a factor of two between 2020 and 2025. Why is that important? Because it allow us to get a lot more wafer out for the same area in the fab. This help the customer economics, our economics, this is a much, I will say, efficient way to get the output you need in the fab. This is a bit, I will say, the focus of EUV moving forward, of course, this will allow us to meet, we believe our customer demand. The green bar is now, of course, the combined wafer output you get if you both drive productivity and system output. This we also expect to change every year, so we've been looking almost at this point of time every quarter what's happening in the market, and of course, we will continue to adjust to make sure again that we can provide our customer with the number of EUV machine needed. The table on this on this slide, I think you may remember it, if you was with us in 2018. This is just a translation basically of how many tool you need per fab. We look in this case at 2021 and the current 3600D model, depending basically on the number of layers and the number of exposure. If you take memory, for example, for about 100 k wafer start per month, one to six exposure, we are going to look at 29 system per fab. Same idea for logic. The other element, and I think this has been maybe something we didn't fully expect when we talked back in 2018, this is a DRAM adoption. We were very confident for many years that EUV will have a major impact in logic because we saw a lot of complexity coming up with multi-patterning. I think it was for a long time less obvious for DRAM, and in the last two, three years, we started to see also the adoption of EUV by all DRAM customers. If you look at the wafer output today, it's still pretty small, but we expect this to grow over time to about 30% by 2025, which is, of course, in term of opportunity, quite a nice addition to what we were looking at maybe in 2018. The question could be why, and this is a bit here. Martin already talked about it. He explained that, I will say, one of the mission we have at ASML is to help customer to reduce the complexity of their process. You see it a bit on this graph, where we look basically at both the number of critical litho masks for a certain node, at DRAM, and also the total number of process step. The blue bar is without EUV, and you look at a very large multi-patterning scheme. The purple one is with EUV. What you see is happening is that EUV will both reduce the number of litho layers, but of course, as a result, it will also reduce the total number of process steps because every litho layer require, of course, some additional step to support patterning. This is the best way to reduce defect, improve cycle time, and reduce cost. This is a bit our view. If we focus a bit on the defect itself, which became, I think, more and more important, a lot of customer have been explaining how EUV has helped them to reduce defect and improve their yield. I wanted to share with you an example that you may have seen most probably already. This is from Samsung, this is one of the initial data results they got on EUV when applying EUV to DRAM. What you see here basically is that Samsung did explain that on the first layer where EUV was implemented, they could see up to 20% defect reduction. This is, of course, extremely valuable, and more importantly, this is a way to continue to enable our customer to move their roadmap by limiting the amount of complexity with patterning. If we look now a bit forward, I'm going to talk about first the 0.33 roadmap and then the High-NA roadmap. 0.33 NA is now in production. Customer are relying on the tool now, tomorrow, and in many years from now. A little bit like we have done with Deep UV, where Ron will show you later on that for many, many years, we have developed a very comprehensive roadmap, we plan to continue to do that. We take the same approach with the current platform. In the next few years, we will continue to improve the NXE platform to provide better overlay, better imaging, and better productivity. To be honest, we believe that this will be going on for many, many years to come, as we don't see the use for this platform to really go down and even less so disappear over time. Of course, it will be time, as Martin explained, to make yet another step on reducing complexity. This other step will be done by High-NA. I will talk about two main things about High-NA. The first thing's the value for our customer. Martin already alluded to that. This will be very similar to the value we had when we introduced the 0.33 platform. I will talk a bit also on how we plan to introduce this platform because I think we want, in many ways, to avoid some of the challenges we had when we introduced the previous and current EUV platform. If we look at High-NA, first, we will give our customer some access, some early access to the tool as early as 2023, so that they can kickstart together with us their development. We will ship our first R&D system in 2024, and 2025, 2026, depending on the customer plan, we plan to run this tool in production. In order to do that, two models will be on the market. First, the EXE:5000, which will be, if you want, the first R&D tool, allowing customer to again get started on process development, and then the volume tool, that will be the 5200, with an overlay and a productivity that will, of course, match the state-of-the-art of our current 0.33 platform. If we look at High-NA itself, otw main value. The first one, of course, higher NA means higher resolution, and this means basically that customer will be able to print smaller feature with a factor of 1.7, resulting into an increased density, almost a factor of three. Second, and that's also very important, High-NA will provide higher imaging contrast, and this imaging contrast will translate into better local CDU. Martin talked quite a bit about EPE, which is one of the key parameter to define the yield of our customer device. Better contrast, better imaging contrast will help basically to improve this EPE and therefore, the yield on critical layer. Martin also say that, you know, if I had to explain you High- NA, you know, I think by now a lot of you understand why EUV introduction was important and why replacing multi-patterning Deep UV with EUV brought less complexity, better yield, better cycle time. What I would like to say about High-NA, it's pretty much the same story. The only difference is we do that a bit later because we will do that at a time where EUV 0.33 is getting again into very complex multi-patterning scheme. The idea of this graph, which I used already in the presentation, is just to make that point. The value of High-NA will be the same as the value of 0.33 today. If you understand why 0.33 EUV was important for the market, you also understand why High-NA will be and why it is therefore important for ASML to be able to deliver this tool around the horizon of 2025, 2026 for high volume manufacturing. If we look now at the change, Martin talked about commonality. He also talked about dark age, and I think you all remember that the introduction of EUV to the market was a difficult one. It took, in fact, most probably more than 10 years to really get the product mature enough for high-volume manufacturing. The reason for that is a bit on this chart. When we went from Deep UV to EUV 0.33 NA, we pretty much changed everything. We changed the source, as you all remember, and this has been by itself, I will say, most probably the biggest challenge. We also changed a lot of things on the scanner, starting with the transition toward vacuum, and of course, we changed the optic from transmissive optic to reflective optics. The idea with High-NA is, in fact, to try to reuse as much of the knowledge we have on 0.33, transfer it to 0.55, and change one thing because we have no choice but to do that, which is the optic. Of course, High-NA require new optic. Martin talked about commonality as a goal. When it comes to EUV 0.33 and High-NA, I think this is a very important part of the strategy moving forward in order for us to secure a better introduction, but also reduce our cost and our development time for the platform. This is a different view. This is the tool, and we look here at the main elements of the system: reticle stage, projection optic, illumination. What you see in white, the source, the drive laser, the wafer stage, the wafer handler, the reticle handler, this is all common. It means basically that whatever is working today on the current platform will be also used on High- NA. As I mentioned before, the change will be mostly limited to the optic, the illumination. You see some changing on the reticle stage, even there, in fact, over time, we will also drive the commonality for this reticle stage on both platform. That's a very important element moving forward of our High-NA program. Now, I told you that one of the things we cannot really avoid changing is the optic. The optic has been a major technical challenge. I told you before that we had a formidable partnership with our customer. It's true in many ways with our supplier as well. In this case, ZEISS has been working with us to develop this new High-NA optic. The picture you see here, so it's not, we don't have the intention to show off, but what you see here basically is the metrology system we had to develop together with ZEISS in order to be able to bring the optic to the right level of aberration. This is very unique. This has been specially designed for this new optic, and this is, of course, by itself, a major technological achievement. Why is that important? The answer is here. This is one of the High-NA mirror. This mirror has a side of about a meter diameter, so that's pretty large. And we need to be able to achieve an accuracy of 20 picometer. A picometer is 1,000 times smaller than nanometer, in order basically to be able to get the right resolution with our defect on the device of our customer. To give you an idea also of what is 20 picometer, we make this analogy. If you basically enlarge this mirror to the size of Earth, of planet Earth, and you want to achieve basically this accuracy, this will mean that the biggest aberration on the surface of the Earth, sorry, will be the size of a human hair. This type of technological challenge we have to achieve, be able to make it, be able to measure it, and of course, be able to do that in high-volume manufacturing. The good news is that those mirrors now are being produced. We started the production of the first mirror for High- NA. We believe at this point of time that we have made a lot of progress on the technology to retire a lot of the risk we initially saw on those mirror. Few more picture, Martin was showing you a few. This is an animation, a movie basically of our High- NA factory. What you see here, it's been mentioned before, is that we started to basically build a tool, so the modules are coming in. We're working with many, many different suppliers in order to basically bring the tool together. You remember first tool will be available for customer first half of 2023 at ASML. It means that the next 18 months will be spent to really put the system together. As Martin mentioned, the progress is good. We have been ramping the team both in R&D and operation in order to be able basically to deliver this tool in this time frame. Now, one more things on High- NA. You may have paid attention to the size of the tool. This is, of course, moving us to yet again another dimension. We are spending a lot of attention on how to make sure that the tool we are going to introduce is reliable. We want to make sure that our customer with a very short time of R&D can go to high-volume manufacturing. How do we do that? The system becoming bigger, we decided to basically break it down into a few different modules, reticle, optic, wafer, source, and each module will be qualified independently before we bring it together in order to build a machine. If you want, we create four different mini-machines that are going to be built, qualified fully independently so that the integration of the four will basically most probably be more successful than if we had to put everything together from scratch. I'm showing you a bit this story because, you know, I could understand based on what has happened in the past on the introduction of the 0.33 platform, that you may ask yourself, "How does ASML this time can bring this platform basically more quickly and more successfully to the field?" I think, again, two main answer to that. The first one is very high commonality with the existing platform, and the second one is a lot of attention also in the way we're going to build a tool, service the tool upfront in order to reduce the risk even before we ship the first system. This bring me to the last part of the presentation, which is basically the profitability of EUV product and service. We spent quite some time on this three years ago. I think, you're aware that the progress made has been good. What I'd like to talk about in order to explain again how we are going to continue to drive profitability, I'd like to focus on the value. This is basically our roadmap. I told you that we plan basically to introduce a new system more or less every two years. Every system will bring an improvement on overlay. Martin was showing in his slide why overlay is important to enable our customer to scale their device moving forward. We talked a lot about productivity. Productivity is good for all kind of reason. The simplest one is that you need to make less machine for the same output. I think, you know that because we have been driving that for all platform for many, many years. In the case of EUV, this will of course help profitability, but this, as Peter explained, is also going to be a major tool at the same time, basically to provide our customer with the right capacity. Finally, service. Wayne is going to touch on this later on. Service was also a major challenge three years ago, very expensive for ASML. We have been able to increase the value of our service by improving our wafer per day input, and this basically is allowing us also to use service to also drive the profitability of the business. This is a bit the overview, the summary. Again, the dark age, we believe, is behind us. ASML EUV is in production today with 0.33, later in a few years with High- NA. Customer will continue to increase their adoption of EUV. That's what we believe based on all the discussion we have with them. The capability is a major focus. We need to be able to continue to provide to our customer what they need, and we will be doing that by increasing our capacity and our productivity. The product roadmap, I think we just talked about it, very extensive, very comprehensive roadmap for both 0.33 and later on High- NA. What I should add maybe is that ultimately we of course expect both platform to run in parallel at customer and be divided between layers depending on their complexity. Finally, product profitability. The fact that we have matured our platform, the fact that we are capable to continue to extend our roadmap, position us also very well to continue to drive this profitability. With this, I'd like to thank you very much. It's time for a short break. We have about 10 minutes break, then we will be back and Jim Koonmen will present the application. Thank you. Good afternoon, good morning. My name is Jim Koonmen. It is my pleasure this afternoon to take you through the application story and the business opportunity associated with ASML's applications business. In a nutshell, key messages. The applications business is projected to grow at about a 20% compounded annual growth rate for the period 2020 through 2025. The applications product portfolio is in support of the ASML scanner business. What we do is we provide the metrology, the inspection, the control algorithms, the software, the interfaces to the scanner that allow the scanners to perform better. We deliver leading solutions in optical and e-beam inspection and metrology. Collaborating closely with our customers, we integrate ASML's complete product portfolio so that we can help our customers optimize and control their litho process. The primary drivers of growth for the applications business will be the extension of our EPE roadmap. We have new offerings in metrology, inspection, and control. We have innovative products that combine computational technology, YieldStar, and e-beam metrology, and we put all of those things together with leading-edge software products and deep learning techniques in order to deliver value for our customers. What I'd like to do today is in four sections walk you through the application story. First we're going to talk about the market segments that we operate in and some inflection points that are occurring that informs our product roadmap so that we can take advantage of those inflection points. I'll then pivot to a discussion of holistic lithography strategy that ASML has pursued for the past 15 years, and show how we bring all of the applications products together in order to deliver holistic lithography performance. We'll go a little bit deeper and talk about how we actually drive improvements and deliver value in EPE. Finally we'll wrap up with the e-beam inspection story, which is all about HMI and multibeam and how we deliver parts per billion defect control and defect monitoring. If we look at the market segments that we compete in, there's really four major market segments, and going from the bottom, we start with scanner and process control software, going up to computational lithography of Brion, further up into the optical and e-beam metrology, and on the top, high-resolution inspection. If we look at the total TAM in those market segments in aggregate in 2020 is about EUR 4 billion, we expect that's gonna grow to 2025 to about EUR 6.7 billion. We have a significant growth in the TAM in the market segments that we're competing in, about 11% or 12% CAGR of the TAMs. The drivers in each of those segments are listed in this slide. In scanner and process control software, it's all about the transition to EPE that Martin and Christophe have talked about. It's about the adoption and expansion of EUV and high volume manufacturing. Of course, it's about advanced correction so that we can correct for more complex signatures on the wafer. In computational lithography, it's all about model accuracy, can you predict what's going to happen on the wafer, and about reducing compute costs so you can produce reticles in the most cost-effective way. In the metrology space, accuracy, precision, and massive metrology, you're getting a lot of data at a reasonable cost, are the mantra of the metrology products and the folks who work on metrology in the applications group. Finally, high-resolution inspection is all about resolution and throughput, and ultimately parts per billion failure measurements. As we go forward from 2020 to 2025, that growth that I told you about is driven by a number of things. There's a number of technology shifts which either have been occurring and will accelerate, or are going to occur in this 2020 to 2025 timeframe. I'm not going to go into detail on each of these because each of these shifts is what really drives our product roadmap. Martin showed the applications product roadmap, if we start at the scanner process control software, the shift that we're looking at is the transition to EPE control. What that's going to require is a significant advancement in the number of scanner actuators and the power of those scanner actuators to correct overlay, CD, and EPE signatures on the wafer. In overlay metrology and E-beam metrology, we're talking about fast stages, we're talking about multiple wavelengths for process robustness purposes, and in-device metrology, where we don't measure targets anymore, but we actually measure the actual device, which opens up a whole host of opportunities for us. With e-beam metrology, we wanna do high resolution, large field of view, cost-effective, massive metrology. You'll see how that comes into our EPE portfolio in a few slides. For e-beam defect inspection, multibeam is the key focus for ASML and for the HMI team within HMI within ASML. We're also for the single-beam e-beam inspection, we focus on high landing energy and guided inspection. Last but not least, for Brion and computational lithography, again, it's about model accuracy, it's about cost of producing these complex reticles, we apply deep learning techniques and machine learning techniques in order to deliver that value. That's the product roadmap which is gonna allow us to take advantage of the industry shifts that are going to be occurring in the next three to four years. If we talk about holistic lithography, Martin walked through the holistic lithography story, and I'll maybe just amplify a couple of points. At the top, we start with the world's best scanners, and at the bottom left, we have Brion's computational lithography, and at the bottom right, the metrology and inspection tools in our portfolio. We connect those point solutions, if you will, with applications that are there to help our customers produce cost-effectively with high yield. As you make their process window bigger, things get better for them. The applications detect the process window, they make the process window bigger, and then they help our customers control the process window. Previously, this holistic litho triangle was focused in the center of the triangle on optimizing for overlay and CD, and we ran control loops on overlay and CD, and that served the industry extremely well. Going forward, I think the next generation of the holistic litho triangle will be a transition to Edge Placement Error. Edge Placement Error is a combined metric which deals with overlay and CD and local variation, and we put that all in one metric, which is a very powerful metric, which I'll also describe in further detail. Going forward through the latter part of this decade, we see the holistic triangle targeting a new objective function. Not just overlay and focus, not just EPE, but also defectivity itself, and that's the ultimate link to the yield of the device. This is the conceptual approach or the conceptual visualization of the holistic litho strategy at ASML, which we've been pursuing for the last 15 years. Conceptually, it looks like this with the triangle, but if you lay it out the way the fab looks, you can see sort of the linear flow of wafers through the fab, where you build the reticle on the left, it goes to litho, you expose a wafer, you can do metrology after litho, you can then etch that wafer, and then you do multiple metrology steps after etch. Our vision in the Applications Product Group at ASML is that we want all data from those processes available at every step in the flow. We bring all of that data into a data infrastructure where we categorize, where we correlate, where we save, where we put the right security around that data, where we put analytics on top of that data, and where we build applications that sit on top of that common data framework. These applications then take that data in, analyze it, create control solutions that can then be brought back to the scanner to deliver real value for our customers. If I go forward now to talking about specifically how we drive improvements and deliver value in Edge Placement Error. First, Edge Placement Error, a little more detail on what it is and why it's so important. On the left-hand side of this slide, you see what we call our Edge Placement Error wheel or our budget breakdown. Edge Placement Error has components that come from OPC critical dimension errors. It has components that come from, in blue, overlay, and then in the darker orange colors, you see global and local CD errors. All of those things come together in what we call our Edge Placement Error metric. The little film that you see running on a loop in the center of the Edge Placement Error wheel is an example of a unit cell where we've taken E-beam images at many points in the wafer and stitched them together. That unit cell is intended to be exactly the same at every point in the wafer. What you actually see is the contact in the upper left, you see that wandering around a little bit. There's some source of variation that's producing a sub-optimal patterning result. The Edge Placement Error metric will help us identify that and then help point the solution towards where we can improve to deliver value. Edge Placement Error is so important because it is the best predictor of yield. I talked about how we moved from measuring and controlling overlay and CD to measuring and controlling Edge Placement Error, and the reason why we do that is shown on the right. If you just correlate CD or overlay to yield, you get a reasonable correlation, which has served the industry well. The correlation to yield of Edge Placement Error is so much better, and that's why we need all of the data that's associated with overlay and OPC CD errors and global and local CD errors. We put all of that data together into the EPE metric in order to drive solutions. I'm going to dive into the blue part of the EPE wheel on the left, which is overlay. How do we measure overlay? That's done with the YieldStar optical overlay metrology tool. This is a in-house developed diffraction-based overlay metrology that ASML started working on about 15 years ago, and we really started to catch the market need about 10 years ago and have been growing market share ever since. What we do here with diffraction-based overlay is we measure targets where about 800 points on 4 wafers in every lot, we can get a very accurate signature of the overlay on a given wafer. We can then feed that forward or feed that back to the scanner to correct the next lot for that overlay signature. We've been very successful with this product, and now we have, for critical layers, immersion and EUV layers, we have a very strong market share with the YieldStar optical diffraction-based overlay tool. On the right-hand side of the slide is an expansion of that fundamental technology, where we move into the space of measuring after etch in device with the optical metrology. What that allows us to do, very importantly, is measure just about anywhere on the wafer, especially in DRAM and NAND. We can measure anywhere on the wafer, we can make an overlay measurement, and then that very high spatial frequency signature can also be fed back to the scanner for advanced correction. Provide substantial value, and we're seeing very nice growth in our business with the in-device metrology tool in the memory segment. That's the optical overlay metrology, and that's in blue here in the metrology column in the middle of the slide. Edge Placement Error is more than just overlay. Edge Placement Error is overlay, it's also the global and the local CD. That's where we need to bring in the HMI eP platform, which is a very high-resolution, large field of view, e-beam metrology tool, which allows us to make millions of measurements in less than an hour on a wafer, and get, again, a very high spatial frequency signature that allows us to feed corrections forward to the scanner. When you combine overlay and Edge Placement Error on one layer and Edge Placement Error on the second layer, you put all of those things together, then you can have an EPE signature, which you see in the monitoring column in the slide. In this case, you can see as it goes from green to red would indicate where you may have a yield challenge. You see there's a portion of the wafer where the yield is not projected to be good, and then you can start to make corrections with the scanner. What you see on the left, if you make a correction just on overlay alone or CD alone, or overlay and CD separately, you get a certain yield. If you can do it in a combined way with Edge Placement Error and use the full actuation capability of the scanners, you can deliver higher yield. Again, this correlation of EPE to yield is what's shown here and why the industry is moving in this direction. We need lots of measurements, millions of measurements, thousands of measurements on overlay, and millions of measurements on CD to feed the scanner correction capability. This is where it all comes together with the holistic litho strategy because the ASML scanners are uniquely able to find, measure, and correct for patterning variations. They are the tool to improve EPE and yield in the fab. Why is that? It's the case because with the TWINSCAN scanner concept, we not only measure every single wafer that goes through the fab, but we expose every single field on every single wafer individually, which allows us to set the actuation values of all of the knobs that we have on the scanner. It allows us to set those actuation values in an optimal way. On the right-hand side, you can see an example of the number of scanner correction parameters that are fed to the scanner per lot as a function of time. 30 or 40 years ago, customers would feed maybe 10 correction parameters per lot to an ASML scanner, and that would be used to correct overlay or CD or focus. Today, that number is 100,000. As the scanners become more sophisticated, we have been able to add actuation capability to the scanner, which when combined with these very precise high spatial frequency signatures of what's occurring on the wafer, allows us to understand and ultimately to correct and control and deliver better yield, better Edge Placement Error for our customers. It doesn't get any easier as we go forward. Martin talked about over the next decade, there's a number of drivers that are going to continue to shrink the size of the patterns on the wafer. What you see here on the left, as we go through time, the size of patterns of different unit cells are going to shrink. We move from immersion to EUV to High NA EUV, things are going to get smaller, and that's going to decrease or reduce the EPE budget that's allocated. On the right-hand side, you see the combination of measurements of overlay, of EPE, and of defect inspection. The era of overlay control required thousands of measurements per lot in order to provide a good correction, and that's you're seeing in the dark blue. In the medium color blue, you see the transition to EPE, where we talk now about millions of measurements per lot. That's what's coming in the first half of this decade. Finally, in the last half of the decade, when we start to think about measuring defectivity, at the scale we need to, and then ultimately creating control signals out of that to feed back to the scanner, we're talking about billions of measurements per lot. That's one of those industry inflection points that's going to occur this decade that will drive the need for metrology, as well as drive the need for more sophisticated actuators on our scanner platforms. Do we really need part-per-billion monitoring and control strategy? The answer, I think, is yes. Today, server chips can be on the order of 800 sq mm in size, as you see here in this picture. The density of transistors, or in this case, contact holes, you can get in a single square millimeter, you can get something like 100 million contact holes. That number, that density, is increasing by about 1.5x per node. If you want to produce with high yield, you need a very high success rate of those contact hole printing. In order to get that large server chip to yield, or to perform at maximum performance levels, you can't have things like you see in red, where you have a contact hole that just simply doesn't image well and doesn't open. You need 80 billion of those contact holes in order for this chip to function, and you're gonna need a metrology tool and a metrology process to be able to understand that and comprehend that. That's what leads us to the e-beam inspection story part of applications. High resolution e-beam has been around for a long time, and we all know it provides superior resolution to alternative techniques, superior signal to noise. It enables the detection of tiny pattern fidelity defects. If you're trying to image, if the design intent of a customer is seen on the left, that's the design of the chip, and that gets put on the wafer, and you try to image that with, for example, an optical tool, the just the physics and the optics inherent in the resolution, doesn't allow you to resolve those small patterns at advanced nodes. This is becoming an increasing challenge, again, as we move to EUV and High NA EUV. E-beam, of course, is a high-resolution tool. The similar image taken with an e-beam tool. Let me just advance it. There we go. It looks like this. Very clear, looks very much like what the designer intended, very high fidelity, and then you can actually make correlations back to back to the designer intent. You can look at things like line end pullback or if there's any sort of necking that's occurring. You can make judgments about whether the actual chip has been manufactured in the correct way. Martin showed this slide where we put on the X-axis the defect size and on the Y-axis the throughput. I think it was Milton Friedman who said, "There's no such thing as a free lunch." That resolution that you get from an electron beam inspection system unfortunately comes with the cost of not being very fast, so you can't cover a lot of ground, and that's the challenge that we have to be able to overcome. What we try to do with our roadmap is we try to, in a multigenerational way, increase the throughput of the e-beam tool while maintaining the resolution capability from gen 1 to gen 2 to gen 3 multibeam by the end of this decade. We believe our ultimate target is to be able to satisfy that very high resolution requirement that allows us to see those defects to the degree that we need to see them and do it in a way where we can get to speeds approaching 1 wafer per hour. It's a challenge, but we believe we have a viable roadmap that's going to get us there. HMI has been a technology leader in the e-beam inspection field for many years. They have two primary applications that they operate in and that we work in. On the left, we have voltage contrast inspection, and on the right, physical defect inspection. Voltage contrast inspection is about the detection of interlayer defects which cause electric opens or shorts. It can tell whether a contact is correctly connected to ground, or if an etch process didn't work very well and there's an open, you can tell that by seeing bright or dark signals on the surface of the wafer. This type of technique is heavily used in DRAM and NAND. It's also very heavily used not only in R&D, but also in HVM as a process tool. On the right-hand side is physical defect inspection, where you're using the real resolution capability of the e-beam tool down to 1 or 2 nm pixel size to be able to see interlayer defects like design and process weak spots. The transition to multibeam allows us to keep pursuing those use cases and those applications, but again, as you saw in the previous slide, by climbing the throughput ladder. You can see some examples. This is our 3-by-3 eScan 1000 multibeam, which we have shipped and installed at a number of customers. We also have one in our R&D center at San Jose. You see some early application learning and development that we've done, again, along with customers at all those locations. Voltage contrast on the left and physical defect inspection on the right. We're making steps, and we're advancing with our multibeam goals. We think we're gonna be successful with multibeam because we have the key points of technology that will enable us to be successful. It all starts with the most advanced electron optics, which ASML brought into the company with the acquisition of HMI in 2016. We combine that with ASML stage technology and the computational technology of Brion, especially the deep learning techniques, and all of those things together allow us to produce multibeam systems which are in operation at customers, delivering value today and getting early learning. Where are we current status on the multibeam? We are, as I said, we have 3 three tools in the field. We have one tool in San Jose. We're learning at a very rapid rate and applying those learnings to the next generation, which is the HMI eScan 1100, which is a 5-by-5 or 25 beam multibeam system. You can see an image in the center of the slide which comes from that multibeam system, so you can get an idea of the resolution and of the throughput capability. When you start to multiply beams, you can immediately start to get significant improvements in throughput. The key messages on multibeam are this technology is challenging. It's not an easy thing to pull off, but we are working very hard on it. We've experienced some program delays. We had an original partnership that we had planned to pursue multibeam with another industrial partner. That didn't work out for a number of reasons. We've also had some COVID-related delays. At the same time, we've also added additional expertise to our team. We were able to bring into the ASML family a team of electron optics experts that are located in Delft, the former Mapper team, and they have joined this effort, this multibeam development effort, and have brought with them not only skills, but also significant IP that allows us to move forward. The bottom line is we remain confident about multibeam, and we remain committed to realizing its market potential. This eScan 1000 5- by- 5, you can see we have it up and running, and we're putting it through its paces. We're doing the final integration steps now, and we are expecting a first shipment of this tool to a customer in Q4 of this year, before the end of the year. In summary, we operate in a market segment space which in those four market segments have a very good growth profile. We think the market TAM in those segments is gonna grow somewhere on the order of 11%-12% between 2020 and 2025. We believe there are a number of industry inflection points or accelerators that are going to occur in that time frame, which provides an opportunity which we will fill with our applications roadmap, with inspection tools, with metrology tools, with control software, with algorithms, and ultimately with feedback to the scanner that will deliver improved performance. When we do that, we believe we can deliver a 20% compounded annual growth rate in our revenue in the applications business at ASML from 2020 to 2025. It's all about making the scanner better. At ASML, we combine the capability of the metrology with the capability of the scanner, and we do that in such a way that we can understand, we can measure and monitor and understand the signatures that are occurring on the wafer at these very advanced nodes and feed with cost-effective, accurate metrology and defect inspection results, feed those correction algorithms to the scanner in order to be able to deliver improved Edge Placement Error and ultimately improved yield. Thank you very much for your time and attention this afternoon, and I am going to now turn it over to Ron Kool, who heads up our DUV business, and he'll take you through the DUV business opportunity. Thank you. Jim, thank you very much. Yeah, it's my pleasure, first of all, to say good morning, good afternoon, good evening to you, and to present about the Deep UV products and the business opportunity of those products. We go to the key messages of this presentation. Particularly, I like to start with clicking the slide. The Deep UV demand, if you look to it, currently, it's at a current high record high level, and effectively expect that to remain there for the coming years. We're talking there about record high, both in advanced, but also in the mature market segments. First of all, looking to the advanced market segments, logic and memory, what we see there, and particularly technology drive is still very much happening. We extended our roadmap on all wavelengths, both on performance and on productivity, building there on the NXT platform. The NXT platform being the platform where the machines are coming from with the highest performance being both in terms of accuracy, but also in terms of throughput. That's in particularly on the Deep UV side, where we see that in the advanced market segments, the scaling is being supported. Also if you look to the mature markets there, and here we include also the to that market, the more and more applications, we see that presents effectively a gross market opportunity. We build there further on the XT platform, where we do modifications, we do adaptations effectively to be able to cope with the requirements of those market segments, those scattered market segments in the mature market. Also I'd like to mention, where we're looking to is to optimize the install base for our customers, where we see there is an increased focus, increased demand also in terms of value-added services, in combination of upgrades with respect to productivity and to performance. Starting with the markets and starting effectively with, I would say, going back to 2018 and the projection we made at that point in time, on Deep UV. On the left-hand side, you see, I would say, depicted the ratio in terms of the systems and the installed base. You see also moving to the right on 2025 what our expectation was, in the sense of we expected the market not really to growth, but we expected that the ratio there in terms of the systems and the installed base would move to an advantage to the installed base. We based our forecast at that moment, first of all, on the expectation that the EUV would be adopted and EUV would take away a lot of layers from Deep UV. We also were gaining, or we were calculating with expected market growth rate that we saw at that point in time. If you now go to current 2021, you see that, I would say, the size of the circle has grown. That's first of all, if you look to 2025, we expect it to be at the same level as we currently are in 2021 if you talk about Deep UV. There, if you look to the ratio, now the new shipments actually is bigger in terms of the ratio than what we said in 2018. Coming in particularly because the shipments on the Deep UV systems, we expect it to continue at a higher level than what we expected in 2018. First of all, I would say the effect of EUV is less in terms of taking layers away from DUV than what we expected. DUV still remains very important on the high end. We also expect that there is growth in installed base still, but also in the mature markets, which is taken into account in this projection. If we're talking about the markets, I make that distinction in terms of advanced and mature, and for sake of this presentation, advanced means we're talking about resolution in the chip of better than 28 nm, and better than translates into smaller than 28 nm on this graph. Mature is, I would say, then worse than 40 nm. If you look to the advanced segments, because that's usually what we're talking about in ASML, we're talking about the logic, the MPU, about memory, you see that all, I would say that the full assortment in terms of from EUV to i-line is being used in those segments. If you look to the mature market, you see more applications where usually we are not talking about. You see different wafer sizes, not just 300 as what you see in the advanced segment. You also see coming up there 200 mm and even 150 mm. You also see that EUV is not being used there. You see that even in some segments, it is restricted to i-line KrF. I think it's good to make that distinction already here in terms of the wavelengths within Deep UV, going from ArFi immersion down to i-line. The markets, to give you an idea there, particularly if we're talking about the mature market segment, if we're talking about the KrF, one of the wavelengths being used in Deep UV, we're talking here about a market size on the mature side, which is growing to 45% of that total market. In itself, you see that market is moving very much. The growth projection for the next years, it's coming from one, what I just said, and actually Martin showed this slide also. I think it's good here to particularly stipulate what's happening on the Deep UV side. You see in the logic in the DRAM, yes, EUV is coming in, but essentially Deep UV still holds there in terms of the number of layers which are being imaged by Deep UV. If you look to 3D NAND, so that part of the market, you see essentially that the Deep UV is the technology of use, also for the coming years. If you look to our end markets, it says here they are increasingly interdependent. I think it shows very much if you look to a smartphone as an example, where usually the whole discussion is, particularly in terms of the processor unit, and there you see a 5 nm, let's say resolution coming in. What we also should realize in the, I would say, in the periphery of that, of that processor unit, you see a lot of other chips being used, where not the most advanced technology is being used, because now you see also apart from EUV and I would say the high-end immersion, you see that the other ones are being used very strongly. And you see the resolution is not a 5 nm, but effectively you see they're coming to even 130 nm and 180 nm. And what you also see, I forgot to stipulate that, is that the wafer size is not just 300 mm for these latter segments. It's also 200 mm, and as I just said, 150 mm. If you look to the roadmap on Deep UV, quickly go through it. It's the, I would say, the standardized format that we show. On the left-hand side, you see the wavelength. On top, I think it's good to repeat that. It's ArFi, the I standing for immersion. It's giving the highest precision if you look to the total Deep UV portfolio that we can offer in terms of our machine. Underneath that, you see the portfolio ArF, KrF, and i-Line, which effectively what we call dry machines. Next column, you see the capability of those machines in terms of imaging. You see on the high end 38, our customers are able to, by double patterning actually to go far beyond that. This is the inherent capability of the imaging of the machine itself. You see that also given there for ArF down to i-line. You see it's getting less and less critical if you go down the page. On the top, if you look 2021, what are we currently shipping? The NXT 2050, but you also see there on the roadmap on a different color of blue, we have the extension of our roadmap in terms of 2100, making a step there in terms of the overlay. That's the small nanometer number that you see there. We project, also driven by overlay, we project a next step afterwards. You also see that on the high end, we have the, let's say, the 2050, 2100 in terms of the immersion. You also see there the, I would say, the mid-critical, on immersion, you see the 1980, and there you see another phenomenon. We project there a step in terms of the throughput going from a current 295 wafers per hour, making a step up in 2023 to a, beyond the 300 to a 330 wafers per hour. That is substantial, and that means that we get everything out of the NXT platform in order to achieve that. If you now look to the dry part of this roadmap, you see another phenomenon. Currently, we are shipping predominantly XT machines, you see they are coming in, and already shipped on the ArF. You see the NXT platform also taking its place into the dry arena. You see immediately what the advantage there is. If you look to the 1400 on the XT platform, the throughput is about 200 wafers per hour. If you make the step to the NXT, you see that we make a step towards 300 wafers per hour. It's a bit the same as also was Christophe talking about in the EUV context. This is giving the possibility to have a higher throughput on a let's say, if you look to the equivalent in terms of floor space, it's a higher throughput per, I would say, square meter or square foot of foot space. We're going to make that same step on the KrF. On the KrF in particular, I'm talking here about the 0.8 NA machine, which is, I would say, the runner if you're talking about KrF. We're making a step there from the 860 series on the XT projected to a 870 on the NXT next year. It says here, "Next in 2024," I think you may expect there a next step, in particularly in terms of throughput on the NXT platform for KrF. On i-line, the NXT platform is effectively, I would say, overspecced. There we stay on the XT platform, also there we're going to make steps, you see that already projected next year, also there what is meant with next in terms of the throughput on the i-line platform. Having said so, knowing that particularly, there is a lot of demand there in terms of wafer out, we're going to support that, and I'm referring back also to the presentation that Peter already gave, starting this sequence, in terms of having a higher throughput, in terms of machines coming out, but also, as I just showed you, in terms of the output per machine. We make a step there going from the XT to the NXT, and inherently therefore on the ArF dry and on the KrF in particularly, making an important step with respect to the throughput that comes out of one machine. Going to the market segments in terms of the advanced logic and memory. 2050, this is what we started to ship end of last year, and I think what I'm particularly proud about is, yes, the introduction of this system, where I would say the ramp-up in terms of the number of wafers coming out of the system at our customers, I think is very much a sign of how mature the system was already when it was being shipped to the customer. Also the MTBI here in terms of the reliability, to give you a little bit idea, because its reliability 180 hours, it effectively comes with an availability for the customer of more than 96%. I was also proud of that this machine was introduced at the beginning of last quarter, last year, and actually, we were able to ship a machine every week, which means that the ramp-up was not just happening at the customer side, but also was happening on at ASML. I think that's quite an achievement. If you look to the step that we made here in terms of overlay, basically 20% better than what was on the 2000. Making a next step on the roadmap after the 2050 - 2100, again there, what we foresee is a step in terms of the product overlay. Overlay being needed effectively on the, I would say, on the customer roadmaps, but also overlay improvements always give a better yield at the customer side. In itself, making step in overlay always creates value to our customers. What you see, if you look to the machine here, not going into details here, but giving a bit of a flavor, if you look to the right-hand top, you see there the projection optics. In the sense of what we're going to provide is more manipulators to make it able actually to improve the matching between machines. But from that, you see also improved sensors, you see improved handlers in the system, and calibrations, all those things to be squeezing out, I would say, what is, what is possible with the NXT platform. Particularly on the NXT, the throughput is an important aspect. As I just said, going from XT to NXT, if you look to the dry side, you can see actually what it's bringing in terms of the number of systems needed. There is, it's effectively reducing the capital investment, but also in terms of the fab space. What we bring there is a reduction in terms of footprint, about a 17%. You can see on the left-hand side, you see a case being calculated using a 100 kilo wafer starts per month, where you see in this case, in terms of representative five ArF dry layers, 20 KrF layers, you see a foot space of just over 650 sq m. If you now project that, and you do the same amount of wafers out, but now with a NXT setup, you come to about a 560 sq m. In that sense, making that transition step from XT to NXT, we provide customer value, in the sense of output, but in particularly in terms, I would say, condensed output in the factory environment. Going to the mature side, I think this is a picture showing that we made steps in terms of throughput over the years, also on the XT platform. Usually, focus is on the NXT side. You see that on the left, the ArF immersion. You see the step we made between 2013 up till 2023, in terms of wafers per hour, going from 300 and projected next year to go over 300. That's a substantial amount of wafers per hour. If you calculate that back to wafers per day, I'll show you in a later graph, you see it's impressive numbers that you get out per year. You see also on the XT, if you compare their 2013 and what is projected in 2023 on our roadmap, you see that substantial steps are being made there. On the ArF, on the KrF, and also on the i-line. We're talking about a 30% improvement there in terms of productivity. Actually, I particularly talk this in connection to the mature markets. Why? Next slide, I'll come back to that. We think that the XT platform, and it's also where it's being used currently, is very much suited to serving those mature markets. It's good to give a little bit of a flavor here in terms of what is characteristics of these markets. I would say if you look here to the different columns, first of all, you see it's far more segmented than, I would say, the advanced markets. You see there from analog up to power, you see it's different market segments which come with different requirements. Different requirements, not, let's say, all over the place, but on specific elements. Here, in particular, I like to go into the element of the, I would say, the substrate thickness. How thick is the substrate being used? You see here, in terms of, let's say, the indications there, you see a bit connected effectively to the market segment. You see what is standard and what you see a variation there in terms of thin and thick. You see also there is a relation there to between the 300, the 200, and 150. Let me just focus on the 300 mm wafer size. You see there is a standard, you see also if you now go to a thin wafer size, it's about half of that standard. It means that handling those wafers through a systems brings a different requirement to the system. Of course, a thin wafer is, in terms of the solidity of the wafer, is different than a, than a, I would say, a standard wafer. You have to ensure that it stays flat. You have to ensure that it gets through the, through the machine, which means it's not enormous amount of modifications, but still well enough to make it quite specific for serving that market segment. As I said, we think that the XT platform is very fit for that. We're using the XT platform and particularly for these, mature markets, and why? First of all, if you look to the mature markets, the throughput that the customers are asking there is not of that high amount as what we see in the advanced market. Why? Usually, it's smaller fabs that we're talking about, and actually, you try to prevent that the machine is having a too high throughput because now you get reliable too much on a specific machine. The XT platform there, and I showed you on the roadmap, with the lowest throughput is very much suitable. There we are bringing all kind of options to that XT platform. I just talked about the wafer handling, but you can also imagine there and think particularly in terms of the alignment that is needed, so ensuring that the, I would say, one layer to another layer is being aligned very, very nicely, that you see that it's coming with requirements like the alignment to be done on the backside of the wafer. You see that this is an area where modifications on the machines are needed to serve those customer segments. Making a step to the installed base. It is, I think, good to mention there, if you look to the amount of wafers that come out of the, of a, of a machine, and I already talked about that in terms of the, let's say, the high throughput that we have been seeing over the years and over the years increasing on the NXT and also on the XT system. You see there is that the number of machines that is able to produce more than 1 million wafers per year has been increasing. Already since 2011, particularly on the NXT platforms, you saw that the higher throughput that came with that platform, you see that give rise to higher, substantially higher, throughput in terms of wafers per year. There is a distinction there in terms of you look to the amount of systems in the foundry and systems in the memory. You see that in memory, because it's more like slight variations on the same wafers which are going through the machine, you see that it's giving rise to a higher throughput on the machines. But it didn't stay with 1 million. Actually, a step has been made there to 1.5 million wafers per year. You see that coming in, and you see also that has been growing substantially. I think it's noteworthy to mention that effectively, since 2019, the first machine actually were running that good, and also that optimal, being run by the customer, that more than 2 million wafers per year actually came off. Which means that's also what you see at the customer, yes, performance, but also there in terms of the amount of wafers coming up, coming off of the machine, is an important parameter for our customers. That means that it also giving there are opportunities for the install base, because you have been seeing we have been, I would say, improving our machines over time, which means that we know how to make that step in terms of productivity, which translates into we are able to increase the capacity of a fab by bringing those means on install base. That is with minimal lead time because usually a lot of those improvements, they are, I would say, minor modifications, particularly if you look to the productivity side on the machine, and they can relatively easily being brought to the field. The nicest, of course, is if the upgrade only consists of software, and that is where we strive for, but that's not always possible. In a lot of cases, hardware comes into play. This gives an overview there. Just take the 1960. That's I would say the, in the second, in the second column. It came originally with a throughput of 230 wafers per hour. What you see is that. Now you just have to follow there a little bit lower, in terms of the blue points, it's possible to go from, I would say, the row, the column with 230 to the next column in terms of 250 wafers per hour, so that that kind of upgrades are possible. If you look to the agenda, it's called a productivity upgrade. That's what we can make there. It's not just the productivity upgrade we are able to do. We can also make it what we call a node extension upgrade, which effectively means that we can improve the overlay performance of that machine, which means that you're not moving from left to right, but now you're moving from top to bottom. You see there, at a certain point, you come to a blue dot, we're able actually, if you go to the right, to make the performance of that 1960 to equal it to a 1980. In that sense, this modularity, I would say, based because we have a platform there and based because already in designing and making the machine, we take into account that these improvements also can be retrofitted to other types. This gives flexibility for the customer to move from one type to another, to increase capability, to increase productivity. That's also what you see on this graph here, effectively coming back to, let's say the 1960. You see there, if you look to the I would say over lifetime, you can think here, the blue ones is the I would say the revenue generated by that generation. You see on top of it comes the servicing, but also in particular the upgrades. The upgrades here on the PEP, so the throughput, the software I was just talking about, the node extension, but also smaller things, UVLS, for instance, standing for the level sensor. In that sense, you see that these improvements, by porting them back, we give flexibility to our customers, but it's also giving, I would say, revenue, not just, let's say, at initial sales, but also afterwards. Particularly on this one, in the next presentation, Wayne will come back to that because this is a connection slide in our presentations. Looking back in terms of Deep UV, key messages. Talked about the demand. We're talking about advanced, what we, what we expect there in terms of moving forward, but we also see a growth opportunity on the mature market segments, in particular for, I would say, our less critical machines based on the XT platform. On the advanced markets, logic and memory, the technology, the innovation, the drive there for scaling is very much driving the steps we're making, on terms of overlay on our roadmap. We make steps there also on productivity on all wavelengths, and we're making a migration there from XT to NXT if we're talking about the dry, the ArF, and the KrF. The mature market, what I said, particularly building on the XT platform with modifications such that these modifications make the machine fit for the use. The bottom part here in terms of optimizing the install base, by providing value-added services, in combination with upgrades on productivity and performance. I'd like to thank you, and particularly this last one is a connecting statement to the next presentation to be given by Wayne on the service business and the installed base business. Thank you. Good morning, good afternoon. My name is Wayne Allan. I am responsible for customer support. I very much appreciate the opportunity today to talk to you about our install base management, what we are referring to with install base is the servicing and upgrading of our fleet and our customers' fabs around the globe. As our install base grows, our revenue is expected to grow at a 12% compounded annual growth rate. We have litho as a constraint in our customers' fabs, we have an unparalleled opportunity and responsibility to work with our customers to help enable the best fab capital asset utilization, helping them get a better return on investment by maximizing good wafers per day on the fleet. Customer service value depends really on three fundamentals. The first being high availability with minimal long-term downs, in other words, with limited variation, lowest possible service cost per wafer, and working with our customers collaboratively to drive good wafers per day and maximizing the amount of wafers a customer can get through the tool with their particular use case. Upgrades, as Ron mentioned earlier, provide an efficient means of improving system output and extending the useful life of the tool for the future nodes, and I will touch on that as well. In order for us to talk a little bit about the growth here, you look at 2015 until now, we've more than doubled the install base growth or revenue. Where we expect to be this year is a little over EUR 4 billion in revenue, growing to approaching EUR 7 billion by 2025. Coming back to the slide that Ron presented earlier, it's important to see that this is an example of a tool, of an immersion tool that we started to ship in 2009. In the bottom in the blue, you can see the system, revenue sales. This is a cumulative revenue graph, and you can see that as the tools get into manufacturing, into high volume, a growing portion, the green up above, becomes the service revenue, and above that is the upgrade revenue. If you add the cumulative total revenue, and you look at all the way to the right, a 30-year life cycle of a tool, you end up with service and upgrades providing a revenue of about 130% of the original tool sale. This is pretty indicative of what we expect out of most of our platforms. In order for us to talk about maximizing service value, I think it's very important for us to know that fabs are designed with lithography as the constraint of the fab. It makes sense that your most expensive tools, your most complex tools, are gonna be the tools that you have to make sure that you're always utilizing, you always have product in front of it. If you look at the Pareto that's in the upper left, this is an example of a 100,000 wafer start logic fab, an EUV fab, where the first equipment group is EUV or NXE, the second being NXT, and then going forward from there, you have various workstations, such as CVD, etch, diffusion, et cetera. As you go to the right, you see that more of the workstations have buffer capacity. What's dictating the capacity in the fab are the ones on the left, the NXE and the NXT. As you move forward, you want tools that don't cost as much to be having extra capacity so that you can surge product back through based on nonlinearity in the fab and keep it in front of your, of your most expensive tools. If you look at this example, and why this is important is for an EUV logic fab that's a 100,000 start fab, investment in that fab that a customer's gonna have is around EUR 24 billion, including the equipment in the fab itself. About EUR 4 billion, excuse me, EUR 6 billion of that is on the NXE and NXT fleet. A 1% improvement in the constraint, the 1% improvement across the NXT and NXE is gonna yield more than a 1% improvement in capital asset utilization on the EUR 6 billion. It's 1% on the EUR 24 billion because you have buffer capacity elsewhere. As you add capacity in your constraint, you basically enable you to not only use your constraint better, but also the other equipment in the fab. That tends to be the case up to about a 3%-4% increase, then you may start to run into other constraints and have to do some purchasing. For the most part, litho is a constraint of the fab, and improving a 1% improvement in litho really drives heavily the capital asset utilization in the overall fab. I think it's also important to note that that buffer capacity I mentioned is there for nonlinearity throughout your flow. Again, if you have a tool down, you don't want to end up building up WIP and not getting it back in front of your scanners. That buffer capacity is also driven by long-term downs on the scanner being the constraint of the fab. If you're down for more than 12 hours, which is considered a long-term down, you're gonna have a lot of WIP pile up, and then when the tool comes back up, it has to be able to surge through those other workstations and get back to the scanner before idling. By reducing the amount of variation of availability, we can also have a customer having less buffer capacity needed in order to make sure that they're able to maximize the utilization on the scanners. When it comes to customer service value, it really depends on three fundamentals. The first one being what I just described, which is high availability and minimal long-term downs. The second is driving the lowest possible service cost per wafer so that we have recognized value from the customer, but we can also get the value that we need for the investments that we're making in service. Of course, maximizing good wafers per day. Working very collaboratively with the customer in order to ensure that we get the most amount of good wafers through the tool. I'm gonna touch on these and give a little bit more detail. High availability and minimal long-term downs. The chart on the left is a box plot of availability. It's a 13-week average for the last three months. For DUV, which is a mature platform, as was mentioned earlier by Martin, we're at about 97% average availability. You can see the variation down below. We're primarily working there on reducing the long-term downs, which is that tail of blue dots down below, in order for us to drive about 1% up on overall availability for DUV, again, being a very mature platform. As we go into EUV, a relatively immature platform, we're at about 87%, 88% availability today, we need to shift the entire population up at least 7%, then, of course, work aggressively also on those long-term downs or that tail at the bottom. We do that through, of course, working on design improvements and continuing to perfect the parts in the tool through software upgrades, but also using technology to service our systems, and I'll get to that in a minute around diagnostics and remote expert support. In addition to that, of course, we're always focusing on operational improvements and site-to-site benchmarking to make sure we can learn across our broad, vast network. Lowest cost per service is really looking at driving the cost per wafer of service down. Looking at our targets, we plan on 2025, a 20% reduction in cost per wafer in service on DUV, and slightly larger on EUV, given the maturity of the platform. Again, some of the same things we're working on in order for us to improve availability also impact cost. You can imagine, again, better the tool is, the more available it is, the lower the cost is to service it. Some of the technology that we're bringing to the field around diagnostics and remote expert support also help us do service in a much more efficient way. If we look at the graph that was originally shown by Martin, again, focus on availability alone, the 97%, this is a DUV example, isn't sufficient. As Martin mentioned, there are process-specific inefficiencies that exist with a customer's use case that are not necessarily the same spec that we sold the tool for. These customer use cases really require us to take a look at any additional downtime that might be within our standard uptime definition, but still not able to produce wafers for a customer. We have to work very collaboratively with our customers in order to work on reduction of qualification, reduction of defect monitoring, these types of things, in order for us to gain the opportunity, the 5%-10%, which is actually a bigger opportunity, by focusing on a new service model where we can really work collaboratively with the customer to maximize good wafers per day. If you look at these things, and off to the right I have, you know, a dot next to the programs that affect availability and long-term downs, cost per wafer, or excuse me, good wafers per day, and cost down. It's just, I think, intuitive that on the top, that if you improve a part, it's going to improve availability, you'll enable more good wafers per day, and it'll reduce cost. I think that's pretty intuitive. If you look at the bottom as well, there are cost reduction programs that are specifically focused on cost that may not improve availability or good wafers per day, but they're still important because it means we can drive our costs down. Those are things like freight cost reduction or establishing a local repair center. There's also activities that are unique to just focusing on good wafers per day that are beyond the historical availability focus that we've had. This is, again, looking at inline defectivity monitoring and control strategies with our customers, scanner matching improvements, alignment mark optimization, and working collaboratively with a customer on things like track delay reduction. This is what we do very closely with our customers in order to maximize good wafers per day. I'm gonna give a few examples of this so I can put a little bit more color behind it. I think one of the things that I wanted to show was on our remote expert support, which became exceptionally important during COVID-19 when we had travel restrictions and quarantine requirements that kept us from the ability to have experts fly into the regions to help support them on service actions that might be uncommon or to really troubleshoot a very technical problem. We had to bring in remote support and connect our experts that may be on the source, maybe in San Diego or in Veldhoven, so that we could get that knowledge right to our field service engineers in the region. By doing that, of course, we cannot have a tool down waiting for somebody to fly in, go through quarantine, et cetera. It became even more important than it was historically. In addition to that, getting the data from the tools back to Veldhoven so that we can look at data to determine what is potentially causing a problem for a tool so that we can diagnose an issue faster and get that back to the field. This remote technology and connecting our experts to the field is an exceptionally important improvement that we are focusing on. Let me show you what that looks like. ASML's machines means that even the best customer support engineers need help occasionally from remote experts. In some cases, these experts fly to the site and work side by side with local engineers. When COVID-19 hit and travel bans were instituted, ASML needed to find a way to continue to bring this expertise to the field. A remote service project that had been in joint development with customer support and design and engineering was fast-tracked, and within just a few weeks, a viable over-the-shoulder augmented reality technique was implemented using Microsoft HoloLens. With HoloLens, engineers can receive real-time visual support and feedback, reducing errors, escalations, and cycle time. Field engineers often work in tight spaces where even if an expert were on site, working side by side would be difficult. With HoloLens, the engineer and the expert can see the same thing. The expert can share schematics and detailed information, highlight areas of key importance, and guide the engineer through troubleshooting and performing service actions. With HoloLens, the engineer can receive this over-the-shoulder support while keeping their hands free. While COVID-19 accelerated the deployment of this capability, ASML customer support has now fully adopted HoloLens as an ongoing, robust, real-time global collaboration tool. Our remote support using HoloLens brings the expert to the field from wherever they are. This has been a very important step up in our service capabilities, having the ability to connect our experts to the field in real time. There are additional things that we're working on for technology. We're continuing to improve upon our reactive diagnostics. These are trace data off the tool that we can look at, sensor data where we can look and monitor those, and we can see certain patterns that are dictating what the diagnostic issue is, what is driving the tool to be down, and what the diagnostic plan is. Having that help guide our engineers in the field is very helpful to reduce long-term downs so we can quickly get to what the service action plan required is based on looking at that data. Of course, more and more, we are pushing towards proactive diagnostics where we can monitor the health of the tool and we can see shifts or trends in the data that may indicate that we're going to have a failure down the road so that when a service engineer is working on a scheduled maintenance, they can add additional service actions to prevent long-term downs and get into preventative mode. If you look at working closely with our customers on maximizing good wafers per day, I wanted to show an example that we worked with one of our memory customers on improving the throughput on their 1980 fleet. When we started working with this customer, the wafers per day was about 4,500 wafers per day. You can see quarter by quarter as we went through the engagement that we were able to work together with the customer to increase up to 5,300 wafers per day one year later. A pretty significant increase. How did we do that? Again, working very closely with the customer on optimizing production settings. We also rolled out some productivity enhancement packages, which also gained some additional throughput. Of course, focusing on reducing the long-term downs and improving availability, which has also enabled about 200 wafers per day improvement. All of these things together is how we maximize good wafers per day for our customer and ensure that they can therefore get the best utilization and best return on their fab investments. I want to touch back with the conversation that Ron started on extending the useful life of equipment through upgrades. I think if we look at an example, there are different types of buying behaviors that we expect when we are upgrading our fleet in the fabs. Anything that is a software upgrade, we are going to always have that in demand. When you have a hardware upgrade that is a bit more disruptive, it requires longer downtime and it is in high demand at time of lower utilization. Customers are a bit more opportunistic as to when they go for the hardware upgrades that bring the tool down for more time. These upgrades, of course, are focused on productivity, but also imaging and overlay and even life extension packages for tools that are 20+ years old that may need some proactive parts swaps so that they can stay productive. I want to give an example. Ron mentioned a system node enhancement package. This is an example of taking a 1960 platform and SNEPping it, upgrading it to have an equivalent performance of a 1980 tool. If you look off to the left, it's a diagram of the tool. The green part of the tool is a part of the tool that we didn't have to touch. The blue part is where there was some modification or some additional parts that had to be swapped out in order to bring the kind of performance that is equivalent to a 1980. Of course, it's much more intrusive, takes six weeks to do, but it's much cheaper than, of course, buying a new tool, being able to extend the life cycle of this tool. If you can look in the middle, you're looking at the machine overlay. The dark blue is an example of a new tool coming out of the factory for a 1980. The right is this upgraded tool, which has the same overlay performance. While upgrading on the performance for overlay, we also installed the production enhancement package to drive the amount of wafers up and increase 28% throughput on this particular upgrade. Upgrades are really a powerful and inexpensive way for a customer to continue to drive value off of their install base. To wrap up, install base is continuing to grow. It's a growing part of our business. We are very focused on a value-based service model where we can really truly drive the kind of value that our customers recognize, where we can share in the risk and reward there, and improve the productivity and performance also through upgrades. With litho being the constraint in the fab, again, our opportunity and also our responsibility is unparalleled in our ability to work collaboratively with our customers to really drive the customer's return on their fab investment, improving their capital asset utilization by ensuring that we're maximizing good wafers per day across the fleet. In doing so, we're going to be really focused for service value around driving that high availability and minimal long-term downs, very low variation, lowest possible cost per wafer, and driving up maximum good wafers per day by working collaboratively with our customers. Again, we will continue to drive the upgrades that will provide an efficient means of improving system output and extending the useful life of the tool. Thank you for your attention and focus. I appreciate the opportunity. With that, we are going to have a 10-minute break. Thank you. Good morning, good afternoon, good evening, all. You deserve this break, didn't you? Because there was a lot of information that was shared. You were inundated with information, therefore I think you really deserve the break that you just enjoyed. To me, the humble responsibility to try and translate all that rich information that was shared with you, to try and condense that into a language that we all speak, which is the language of euros. That is what I would like to do in the next half hour. To that extent, there is a few things we would like to discuss. Of course, we're going to look backwards a little bit, look at the historic, you know, historic performance of ASML. We would like to look at the 2025 timeframe. I would like to give you a bit of a sneak preview into 2030. And then we're going to have a conversation on the capital allocation policy, which in essence is unchanged in comparison to the policy that you have. To just reiterate what a policy is and how that pans out. Talking about the historical shareholder value creation, I think it's important to look at this slide first, because this really tells how ASML in the past decade has invested into its position in the marketplace. These have been pretty significant investments that have been made as you, as you see here. Investments into R&D, investments into CapEx, you know, both related to R&D, but also CapEx obviously in the manufacturing capability and what have you. We also made a very limited number of very specific M&A transactions that were really geared towards, you know, either removing a number of, you know, obstacles, if you like, that we had on the roadmap or really, you know, building our suite around the holistic lithography proposition. Those were the limited number of M&A activities that we did, and you see those in the boxes on top of the bars. This is what we've done. Admittedly, you know, sometimes these investments and sometimes the R&D expense was a little bit more than the 13% that we put into the model, I think it was money very well spent. I think you see the result of these investments actually in the performance of ASML in the past couple of years. I think this really tells a very significant story. This gives you the CAGR of 14% of ASML's earnings per share over the period since 2010. 14% growth really driven by an engine that fires on all cylinders. On the one hand, obviously, system revenue growing at 10% CAGR since 2020. Also, you know, the previous topic that we discussed, that Wayne discussed, installed base management growing at a 20% CAGR over that time period. Those two also driving the gross margin, driven by revenue growth, but also, you know, very much the gross margin amount at a 13% CAGR driven by, you know, the profitability of Deep UV, of the apps business, and also recently, you know, a good improvement in the profitability of our EUV business. Now finally, all of that leading to the 14% CAGR that we can report over a 10-year period for earnings per share. That's something that has also been appreciated, I think, by our shareholders because that drive for EPS, that continued drive to further increase our earnings, and that helped, I would say, and that was helped by the way also by the fact that we were able to do share buybacks in that period. You know, profitability and the share buyback led to the increase in EPS. I think that's also been appreciated and is reflected, I think, in the fact that we have a TSR, a total shareholder return, annualized, compounded at a rate of 29%, and therefore I think significantly outweighing the respective markets that and indices that we compare ourselves against. That's the past, but of course, much more significant is how does everything that you just heard in the past couple of hours, how does that translate into continuing growth for ASML? That's where I would like to spend the lion's share of my presentation on. Starting with the 2025 scenarios, the way we do it, and the model that we deploy, the model that we use in order to come up with our estimates has not really fundamentally changed from the last time that we met in 2018. The starting point really is how do the end markets grow? The end markets for semiconductors, how do they grow? You already saw that reflected in Peter's presentation, so I'll quickly pick up on that. That demand really then gets translated into what do we think the wafer demand is. What is the wafer demand, you know, building off the end markets development? What does that mean for demand for wafers? What does it mean for the capacity, the wafer starts capacity that is, that results from that, from that wafer, demand? In order to do that, we really, you know, translate then that wafer demand into, you know, for the individual nodes, what does that mean in terms of the different layers that are required? What do those layers require in terms of our litho technology? We have the end market demand, we have the wafer demand that that translates into, and then we translate the wafers into, you know, what does that translate into layer count, and therefore what technology, litho technology is really needed in order to meet the wafer demand capacity that we're looking at. We translate that into the ASML share of that litho market. Finally, we add to that the installed base business and the growth estimate that we have there, you know, based on all the drivers and dynamics that Wayne just talked about. This is the starting point. I'm not gonna spend a lot of time on this because in essence, Peter discussed this. You know, all in all, if we look at, if we look at the next five years, we're looking at a 7.4% CAGR for the semi and the end markets, and you see the composition, the composition here on this slide. As I mentioned, this end market then gets translated into what does it mean for the wafer starts per month for the capacity that is really needed in order to drive that. Again, you would have seen this presentation or this slide also in Peter's presentation, leading to a CAGR for the period 2020 through 2025 of 9.9% on logic and MPU, 5.2% on DRAM and 5.7% on NAND. You also would have seen there is a 3.9% CAGR, not on this slide, but a 3.9% CAGR for the more mature side of the logic business. Those are, you know, significant growth drivers, obviously for, you know, for our business. The next question becomes, how does that translate? How does that wafer demand, and how does that wafer start capacity, how does that translate into litho demand? You know, how can we expect, you know, layer or how can we expect node on node how that litho spend is going to develop? What you see here, it's a continuation from, you know, what we did in 2018, and it actually builds on a slide that Martin presented to you earlier on. This really gives you the percentage breakdown, you know, per node, of the different technologies. A few takeaways here. First off, very, very clear, node on node, you will continue to see, you know, quite significant, growth, 30% on logic and MPU, 20% on DRAM, 10% node-on-node growth in terms of lithography spend, you know, from 1 node to the other, on NAND. That's the build-up there. That's one thing to bear in mind. Second thing to watch for, I think, is to see that you see actually, High-NA kicking in. High-NA is the, is the light, purple, if you like, bar that you particularly see on logic, starting at the panels, but, at panels about 1.5 nm, node. You also see it at the last node that we depict here on DRAM. That's where you see that High-NA is actually, you know, kicking in. That's important to note, and this coincides with the timeframe that Christophe gave you earlier of really High-NA going into high volume manufacturing in the 2025, 2026 timeframe. That's one thing to note. The last thing I would like to call out on this slide is that in fact you do see that while, you know, EUV is getting more and more important in the mix, it's not that immersion is going away. Immersion is still a significant part, you know, particularly of NAND and DRAM, but also in the logic business. You do see that there is a steady portion of Deep UV, and I would say immersion in particular that is relevant here. Just to be clear, when I talk about the distribution of the technologies in this bar, we're talking about euro amounts. While Martin gave you know, the, the layer count, if you like, for the different, for the different nodes, the real, you know, physical layer count, if you like, this really gives you the distribution of the euro amounts, you know, for the different technologies all adding up to 100%. The final element that you need in the model in order to get to the number that we're going to present in terms of, you know, the number that we think we're going to achieve in the 2025 timeframe. The last element, of course, that you need in order to get to that number is the installed base business. Here you see that in the past, in the past five years, we've seen a CAGR of 13% there, and of a much higher base obviously in 2020. We believe that, you know, for the period all the way through 2025, we can drive an additional 12% CAGR of that much higher base in 2020. This really leverages all the things that Wayne just mentioned. Obviously the growing install base, both in Deep UV and in EUV, but also this whole notion that service becomes pivotal and is pivotal to customers, because I think what was very powerful in Wayne's presentation was his acknowledgment that, you know, while lithography is the bottleneck, if you like, in terms of availability in the fab. You know, there is significant leverage of really getting the availability up and having, you know, more good wafers out. There really, lithography is a key way to get there, and as he demonstrated, even 1% extra uptime, there is a very significant value-enhancing measure for the customer. Therefore, doing more and more of this, really bringing a lot of value to the customer, you know, we are able to share some in some of that value enhancement of the customer. Finally, as I think was very powerful in all the presentations, also ones from the from Deep UV and the presentation by EUV, it's very clear there is a lot of potential in upgrades, and really upgrades, you know, continuing to keep the tools at a very productive level such that they continue to provide significant value to the customer. Combination of all of those things really drives a CAGR of 12% of the 2020 base all the way through 2025. If we get all of that, if we get all those ingredients, it might be good to just look at a few of the model assumptions that we have for 2020, for 2025 before really turning to the numbers. A number of these really follow from the conversation that we just had. First one to highlight is that the market share that we have for the different technologies that we provide has substantially remained similar to last time we talked in 2018, with one exception. EUV still at 100%, obviously. ArFi, so immersion, still at 90%. Dry has actually gone up, dry has gone up from 60%- 65%. It's important to call out, you know, that market share is not just, you know, market share, you know, per technology. If you look at the mix and the fact that, you know, EUV in particular has become a more significant element of the total pie of the lithography sales, you know, with EUV increasing there and the fact that ASML enjoys 100% market share there, that means that for the total lithography market, of course, the market share of ASML has gone up quite a bit. If you compare 2025 to 2020, you would see a marked increase in market share there. That's one thing to call out. Next thing to call out, if you look at the logic business, as a reference point there for the 16/14 nm, the reference point there is now 315 k wafer starts per month, which compares to 260 k wafer, 270 k wafer starts for the same period as we discussed it in 2018. This really tells you that what we call stronger for longer. This really means that the nodes become longer, but also the capacity, you know, is actually added to what we expected back then in 2018. Rather than, you know, the total capacity for the 16/14 nm node kind of stopping at 270, it has gradually moved on to 315 for all the reasons that particularly Peter mentioned when he was talking about, you know, the continued drive for the demand for Deep UV. You also see that we are, you know, more optimistic today in terms of in terms of the reduction on node. This time we only talk about a 10% reduction in the most, 15% reduction in the low scenario, which is, you know, a lower reduction, if you like, than what we talked about in 2018. All in all, stronger for longer, I think is the key message that you see here in the logic, in the logic segment. You also see, you know, 20-30 EUV exposures and the first High- NA node going to four to nine exposures. That's important, I think, on the logic side. If we move to DRAM, we see a bit growth which has actually improved in comparison to last time. I think it's interesting also to look at EUV. For EUV last time when we talked in 2018, we had a higher percentage of the wafer conversion, that we were actually talking about 80%-90%. That has gone down a little bit, and that's the result of, I would say, the regional distribution of DRAM manufacturing, but also, you know, the choice of specific customers to, you know, to have for some to have a later insertion in there. What you do see, and I think that is important, is that the customers that do choose to have EUV inserted into DRAM, you actually see a significant increase in the number of exposures. Now we're talking about up to eight exposures of EUV, while in 2018 we thought it would kind of stop in this timeframe at five. It's very clear that those customers that choose to do that are actually excited about it, and I think, you know, some of the comments that Christophe made, you know, are underpinning that and are actually driving up the number of EUV layers, you know, more forcefully than we anticipated. Finally, not a lot of change, I would say, on the NAND side, although the bit growth has gone up a little bit. Those are, you know, the key assumptions in the model and the comparison, if you like, to what we had last time in 2018. Not gonna spend a lot of time on this. These are some of the key challenges that we face within the, within the industry. You know, this is a summary, if you like, of the, of the risks that we typically have in the annual report. You know, what could stand in the way of us achieving our ambitions. Quite frankly, I think if you look at this, the bottom line is a lot of what we have here, the lion's share of this, we can and will manage. That's, you know, that's our responsibility. What really drives, you know, the difference in the different scenarios really is the end market growth dynamic. That's why that is the main, you know, distinction, if you like, in the different scenarios, and also the geopolitical landscape. That's, you know, some might argue maybe presents some risk, but definitely if you look at all the tech sovereignty discussions that we have these days, also presents a significant opportunity for us. That's something that, you know, those are the things that we believe will ultimately be decisive, if you like, in terms of what are the scenarios that we're gonna end up in. These are the scenarios that and the numbers that we presented at the Capital Markets Day in 2018. There we said, you know, in the most positive scenario, so at high EUV insertion. By the way, we don't make that distinction anymore because we believe EUV insertion is a given, so there is no point, we think, in further having a discussion on is the EUV insertion low or high. It's a given that the industry has embraced that both for logic and for DRAM. High EUV insertion at the time against a high market growth led us to a EUR 24 billion scenario at the high end. What you see now is that that EUR 24 billion is actually now the low market. In the low market scenario, we now actually present a number that is similar to the high market, the high market growth scenario that we presented last time. If you look at the differences on the, you know, what we have in terms of unit count, for instance, in the high market scenario back then in 2018 for 2025 in comparison to what we have today, there's a few things that are really interesting. First off, you see that High-NA is really kept here at nine, at five, sorry. It's kept here at five. Both for the low market and for the high market, High-NA is kept at five. That is, you know, lower than what we had even in the scenarios, in some of the scenarios that we had in 2018. That is not because there is any delay in the program or in the shipments. Quite frankly, you know, we're on track there. This really is driven by revenue recognition. We do recognize this is a new technology. It's also a technology where the install time, so between the shipment and the final acceptance by the customer, you know, takes some time. That's why we've been pretty conservative in terms of the number of High-NA units that we actually take into revenue or expect to take into revenue in 2025. That's why actually in both scenarios, you only have five unit numbers there. Shipment, in all likelihood, will be quite a bit higher, but revenue recognition is simply capped at the number of five in this model. In terms of EUV, in the low market, you see a slightly lower number there than the number that we had in the high case scenario in that we presented in 2018. There you should recognize that the EUV tools that we expect to ship here actually have a 60% higher productivity than the C tool. There is a, you know, very significant upgrade in terms of the productivity. That's why even though the unit number is down, the value and the capacity that it brings to customers is, I would submit, at a higher level than what we had even in the high market scenario in 2018. Immersion is higher at 70 here. It's higher even than the, than the high, than the high market case that we had last time. Really, you know, demonstrating, as we also had in a few of the other presentations, that immersion really is, you know, while being replaced at the number of layers by EUV, is still a very strong workhorse within the industry. On the dry tools, more or less in line with what we had last time, and also the installed base management, more or less what we had in the high market scenario, again in 2018. On the high market scenario, of course, you know, is quite a bit more significant and a very significant step up from, you know, from the high market scenario that we had last time. We kept High-NA at five for the reasons I just gave you, but here we see EUV going to 70. You know, rather than the 48 that we have here in the low market, we actually think we can drive that to 70. As a matter of fact, are building, are anticipating capacity to even go over and above that point. Immersion you see here at 87, and dry you see here at 290. Very, very significant numbers. An installed base driven by, you know, a higher installed base, in total installed base management would get you to EUR 7 billion. As I mentioned, we are building more capacity than what we're showing here in terms of sales, and we think that is important because we are assuming, and that was also something that Peter presented in his story. You know, the question is on the tech sovereignty, how much inefficiency, if you like, is being introduced into the supply chain there. There, frankly, we are, you know, quite modest in the numbers that we have here. We do not assume a lot of inefficiency in the, you know, in the manufacturing capability of our customers as a result of tech sovereignty. We'll have to see how that develops, but there could be some upside even from that element, and that's why we believe we should be building actually a bit more capacity than even the unit numbers that we present here. In terms of how do we, you know, compare the different models, the 2018 model, and here I picked the reference case, if you like, the middle growth scenario of 19.3. What drives it all the way up to the EUR 27 billion that is the, you know, the midpoint, if you like, of the guidance that you see in those two scenarios. Main drivers, of course, EUV, and EUV here is actually EUR 4.9 billion is Low-NA EUV, so 0.33, both driven by unit and by the ASP of the tools. Because of the cap that I discussed with you on five High-NA tools, you know, that actually, you know, drives down the revenue with EUR 0.6. EUR 4.9 billion incremental in 0.33 EUR -0.6 billion, as a result of the revenue recognition consideration that I gave you, gets you to a EUR 4.3 billion increase in EUV at the midpoint. On the non-EUV business, this is primarily driven by immersion. Immersion accounts for EUR 2.5 out of the EUR 2.8 that we have here. The installed base business, primarily driven by the fact that, you know, the installed base is really going up, and as a result of that also the revenues that we generate from that is going up. That gives you an insight into how the two midpoint scenarios, how they really compare. That gets you to the financial model. You already saw the top line, EUR 24 billion-EUR 30 billion with a midpoint of EUR 27 billion. That's the sales number broken down, as you see here, in system sales and installed base sales. A gross margin that we expect to be between 54% and 56%. Please bear in mind that because this is the first, you know, this is the initial point, if you like, of taking revenue on High NA, that of course there is a bit of a negative impact on the gross margin resulting from High NA, and that is included in this 54%-56% bandwidth. R&D is here at a bandwidth of 3.4-3.7. At the midpoint of R&D and the midpoint of total sales, you get to approximately the 13% that we've talked about in the past. SG&A, again there, EUR 1 billion. Again, at the midpoint, of sales, you're getting at little under 4%. CapEx also expected at EUR 1 billion. Cash conversion cycle at 200 days, you know, not changing comparison to last time. An effective tax rate of 16%, which has gone up as a result of a number of tax changes in the different geographies in which we operate. Finally, in terms of predictions, you know, how do we look at the next 10 years? How do we look at 2030? Here I should say that what we present here really is what I would call the reference case. We clearly, you know, clearly see that, you know, in comparison to the 11% CAGR for the full period that we present here, we could clearly see, you know, certain deviations and also certain upside, primarily driven, I would say, by the fact that what we do here is that we actually keep litho intensity, constant at a 2025 level. That, of course, is an assumption that some people might challenge and say, "Wait a minute, you know, with High- NA kicking in and all the value that that could bring, should you not expect that litho intensity actually goes up in the second half of the decade?" We have not modeled that, so in this 11% CAGR for the full period, we have actually modeled in that litho intensity is going to remain constant at a 2025 level. We have also modeled in that our market share remains constant in comparison to 2025, so that is the second assumption. In terms of the base, you know, the semiconductor end market and the semiconductor end market growth, that is really where we have used the VLSI number as the basis. If you then make the computation, we have that end market growth, you assume a constant litho intensity as from 2025, you assume a constant market share, then that gets you to an 11% CAGR over the 2020 through 2030 period of 11%, both at a systems level and at the installed base management level. You know, with the comments that I made that if we're able to drive up litho intensity, that of course there would be further potential. Final comment is on the shareholder value creation. It's pretty clear that, you know, with the numbers that we've that we've indicated that, you know, ASML is going to generate very significant free cash flows in the years in the years to come. You know, based on those models, that is a clear expectation. Our capital allocation policy really hasn't changed. In essence what that means is that, you know, what we need in the business, we will use. We will use that for R&D, we will use it for CapEx, et cetera. What we need, we will use. Even then, we believe significant cash flow will be available. We do not plan to do significant M&A in the period all the way through 2025. You know, there might be an opportunity here and there, but there we will be very focused, and we will only do it if it helps us in removing, you know, obstacles that we observe in getting to achieve the roadmap. That really is the way we look at M&A. We do not expect that to be at a very high level in the period all the way through 2025. Dividends, as you know, our policy is to look at a growing dividend, and as many of you know, there is this guidance out there from good governance organizations to suggest that you should observe a 30%, you know, payout ratio of dividend in comparison to net income, and we definitely look at that in our dividend policy. Whatever remains as long as we, and obviously keeping a strong and flexible balance sheet as we put it here, whatever remains is available for share buyback, and you've seen that we that we drive that quite significantly. Dear friends, that is it from my end. I think we've demonstrated significant shareholder value, you know, creation in the past, in the past couple of years for the reasons we mentioned, driving a very strong strategic roadmap, generating strong EPS on the back of improvement of earnings, and a reduction of shares through share buyback. We think we're in a very good sweet spot in terms of growth, both for the first half of this decade, but also for the second half of this decade, and I've given you, given you the numbers there, you know, but also the potential, you know, the potential over and above maybe those numbers. We think with that, you know, we will see a significant growth opportunity through 2025 and beyond 2025. I think the future for ASML is bright, and we're very, very happy to be able to share that bright future with you as shareholders. With that, thank you very much for your attention, and I'd like to hand over to Peter to wrap up the presentation. Well, thank you all. Let me first start off with two apologies. The first one is, we've probably taken up too much of your time, but for a reason. I mean, we wanted this presentation or this capital markets day to be about strategy, to be about how we see the future for the next five to 10 years. That cannot be superficial. We have to be detailed. We have to be like ASML, focused on content. That's why we probably inundated you with a lot of data, a lot of information, and it's basically, you know, like going to a too big meal. Some of us probably had this, and you know what happens. There's a digestion period, and I think that's what we're probably going through. We have to digest this, because I would like to see us talk about our Capital Markets Day data and slides on the core of our business, whether it's EUV or Deep UV, applications, installed base business, our financial performance and our metrics. I would like this Capital Markets Day to be an anchor point for the next quarters, perhaps years, to refer to because this is not about the next quarter. This is about the next decade. Apologies again for the time, but I'm pretty sure, also bearing in mind what we did in 2018 and 2016, that this will be a very nice anchor point for the discussions we're going to have together. That's the first apology. The second one is I have to apologize also to Skip and his team that I didn't join the do's and don'ts just before this meeting. Of course, we have do's and don'ts because Skip is always very careful that you don't let the free radicals out without telling them what they should do and what they shouldn't do. I missed the part about we don't miss wearing a tie. This is I'm the only one not wearing a tie, so I apologize. I was late. Having said that, I'd like to wrap up. I'd like to wrap up before we go into the Q&A. Just the key messages, I think just a summary. This is slide two, by the way. Sorry about that. Slide one, I talked about the global mega trends. I think it's clear. I think we are a highly profitable and very innovative and competitive, which is important, ecosystem that will actually fuel growth across the entire semiconductor market then, and that will also increase litho intensity, as Roger showed and also earlier showed. We think it will grow up to 25%, and for modeling purposes, we try to be conservative. We just kept it at that CAGR for the second half of this decade. Our product portfolio, I hope it was clear. Our product portfolio is very much aligned to the customer roadmaps. I mean, the number one thing about our strategy is customer trust. Yeah. We have to deliver cost-effective solutions. We have to deliver solutions that provide value in EUV, in Deep UV, in applications, and in install base management, and we will. You know, when we now look at those, and if we do that, then I think you can rest assured that we will do that. We then based on different market scenarios, high, low, we've done that before. We have an opportunity to reach annual revenue in 2025 anywhere between EUR 24 billion, which is the low market, and if you look at the assumptions that Roger shared, it's pretty dire, and a high market between EUR 24 billion and EUR 30 billion, with a reference case we use of normally we sit in the middle, like we did also in 2018, about EUR 27 billion, with a gross margin in 2025 between 54% and 56% with some of the, I would say, caveats that Roger mentioned, like, you know, some dilutive effect in 2025 of the early introduction of High-NA, which will be a positive margin, you know, wise, but as you understand, will not fully be on the levels that at that moment in time, Low-NA has. Having said that, all those numbers, 24-30, if you listened carefully to what Roger said, we did not really include any major effect of this technological sovereignty drive. We did not do that. The full High-NA shipment value is not in there either. You know, you know us. We are not a company that hangs out of the window big time. I mean, we feel very comfortable with these numbers and with the growth rates, and let's use that as the anchor point for our discussions for the next couple of years. We see significant growth opportunities. We actually not only in core litho, but also in metrology and inspection. I personally thought Jim was very clear on a complex subject. Also Wayne was very clear on our opportunities in service and field upgrades. I think this will provide this CAGR, which we talked about, the 11%, which basically is for us a continuation of what we actually have seen, and it's our estimate, but of 2020 to 2030 with everything that I just said about potential opportunities to the upside. Having said that, it's all great, we have to make sure that we can deliver. We have to create a supply chain with our partners that actually can meet the, those new capacity requirements and these higher shipment numbers. It is all about making sure that we can meet the customer demand and customer trust is with us, and customers can trust us. We will invest. And like Roger mentioned, when I talk about 50% higher capacity in Deep UV and double the capacity in EUV, but in Deep UV you might argue there's some overcapacity. Yes, that's by design. Yeah. We want to make sure that we are not in a situation where we are today. Yeah. Where, you know, we simply cannot supply our customers with what they want. As an integral part of our strategy, that's ESG. It's an integral part of what we feel is our responsibility to actually meet the requirements and the demands of all our stakeholders, our customers, you as shareholders, our people, our partners, and community, our society. We will continue to invest in technology leadership. You know ASML. We will do that. Roger showed it, significant R&D numbers. That will enable us to provide that value. Of course, when we do all that, it's our commitment that we will do that. We expect to also return a significant amount of cash to our shareholders in a combination of dividends and share buybacks. With that, I'd like to close my closing remarks or end my closing remarks and hand it over to Skip for some logistic instructions on how we continue with the rest of this afternoon. Thank you. Thank you, Peter. All right. Thank you, Peter. Thank you all for, as Peter mentioned, staying with us for the past 4+ hours. We have roughly another hour to go to Q&A. As Peter mentioned, this is very important. Obviously, it sets our strategy for the coming years. We know it's a lot. We'll digest it over the coming months, and we'll work with you all in that front. As far as presentation, this does conclude our presentations, and we're gonna take about a 10-minute break, and we'll set up for the Q&A panel with our presenters. We'll come back. We'll address the questions that you've submitted during the presentations. You can still submit questions during the Q&A. As a reminder, if you can provide your contact information, we will get back with you if we do not address your questions. Please provide that contact information and we can ensure we get back to you for anything we do not get to. Also, we please ask you for any feedback to help us make this event better. Lastly, we will take a roughly little over 10-minute break. We'll set up, and we'll be back at 5:15 P.M. CET to start the Q&A panel. Thank you. Welcome back. We now have our seven presenters here on the Q&A panel. I have your questions coming to me that were submitted through the course of the presentations. Let's just get started. The first one will be to Peter. Can you explain the underlying drivers behind your 2025 and 2030 revenue growth, including contribution from reshoring Deep UV, EUV, install base, and metrology and inspection? Do I understand it correctly that from the 2025-2030? Yeah. Yeah. I think, like Roger said, I said it in the closing remarks, we assume a CAGR from 2020 to 2030 of about 11%. That is based on the fact that the litho intensity that we see growing till 2025, from 2025 to 2030, we don't assume any change there, neither up or down, because, you know, the second half of the decade, there are many, you know, there's customer road maps. We need to think about the detailed mix of advanced versus mature, logic versus DRAM, and we, there's too many assumptions there. We'd like to be on the, let's say, you could call it conservative, but on the side of stability. Litho intensity, with as an end market growing, which we showed, and WFE growing, litho intensity staying at the 25%. With respect to reshoring, you effectively ask us to gauge what the inefficiency will be because of this reshoring, which I think is very difficult. We've not included that very much in our assumptions on the growth rates. It will happen, but to what extent rationale or let's say of our key customers will dampen it or will not, that's a bit of a guess. We didn't put it in. It is the reason why we're building more capacity, as Roger said. You know, because there will be something, you know? We need to have a kind of a guess is what we did and said, you know, we don't want to under-invest in this sense because we know there's going to be additional demand. Yeah, I think it's the base that we had for, you know, for our 2025 model, and Roger was clear about that. Actually, for the second half of the decade, we've more or less stayed stable. Yeah. You could argue that's a bit of a conservative view, but like I said earlier, you know, we are known for not hanging out of the window too much. Yeah. Yeah, we were not going to do this either. Is there some upside on these drivers? Yes, sure. You know, High- NA. Yeah, sure. Yeah. You know, there's another couple of markets there next couple of years, we can give you an update on the second half of the decade, huh? Yep. All right. Thanks, Peter. Roger, somewhat related, maybe you can add anything additional here, ASML's indicating the 11% CAGR growth to 2030. Taking into account the high end of the 2025 revenue guidance of EUR 30 billion, the growth from 2025 to 2030 is approximately a 6% CAGR. That's a bit illogical to approach it from that vantage point. Leveraging off what Peter just said, we introduce a reference case, if you like, for the CAGR over the total 10-year period. Remember, we're talking about something that is nine years out, that's also the reason why we said we're not gonna, for 2030, come up with different cases, right? We're not gonna come up with three different scenarios. We're just gonna have an estimate of a CAGR over that period, leveraging also the VLSI data of how the semiconductor end market develops. In order to get to what you just said, you would assume that in the first five years you are in a high-growth market scenario, but for the total 10 years, you are at the mid-market scenario. That is very unlikely to occur, right? I mean, I think that's the wrong way to do it. I think if you wanna, if you wanna compare the first half of the decade to the second half of the decade, you need to assume the same scenario, right? You need to look at the mid-market growth or the midpoint, if you like, for the first first decade that gets you to 2027, and you get to a CAGR of 8% if you take that analysis. 'Cause you get the 27 at that stage, at the midpoint, working towards 40, right? Yeah. As people have figured out, that gets you to an 8% CAGR. Still, everything that Peter says applies, right? That still means that you're assuming only mid-market growth because that's how we interpreted the VLSI data, only mid-market growth. It assumes a litho intensity, which, you know, doesn't change as of 2025. I think, you know, we should look at this reference case as just a point estimate, nine years, nine years out. If you wanna draw a comparison between the first half of the decade and the second half of the decade, you gotta go for the same scenario. Yeah. Otherwise you're mixing apples and oranges. Yeah. Okay. Stay tuned for next Investor Day. You bet. Our next one goes to Martin. Do you fear disruptive innovation elsewhere in the world that might threaten your strategic roadmap? Disruption can be anything. Let's narrow down what I like to understand by disruption. You could talk about disruption at our customer side, going to different device architectures. I do believe that any, even disruptive change on our customer side, continue to require lithography, perhaps in a different mix. We are offering our products, our full product portfolio, we're doing fine. If I narrow down what disruption could be on litho, now, there, I think, the disruption as we see it today in the recent past, we were also fearing disruption that before EUV was established as a production tool, that we could have an alternative technology competing EUV. I think where EUV today is and our planned innovation moving forward, I think it will be unlikely something else than DUV. If it needs to be EUV, there needs to be somebody else doing EUV. I think our continuous innovation focus, as we do today with going to driving the productivity up, driving the aperture up, and with our current status of R&D and technology pipeline, we see still new products coming up on the horizon, where we can leverage what we have developed for High-NA in more products around DUV. That innovation is so strong that I don't feel there will be a major disruption from a different technology than EUV. Now, on the mainstream lithography, we have today competition. We always have in competition. As you noticed, now it is not disclosed, but we are spending more money in our DUV products collectively than we in every year did before. We continue to innovate also on our DUV system, and Ron elaborated on that. We continue to have a major, we continue to offer differentiation also on mainstream, not only on the EUV side. Yeah. Very good. Okay, our next question goes to Roger. What is your outlook on pricing, more specifically for EUV and High-NA products for 2025 through 2030? On pricing, I think if you look at 0.33 EUV, I think it was pretty clear from Christophe's presentation that what you're really looking at is a roadmap of continued improvement. You know, running on all cylinders again there. You see throughput improvement, and quite significantly so, right? Particularly the step towards the 3800s, you know, gives a significant uptick from 160 to eventually to 20. Overlay, imaging quality. I think the roadmap very clearly established that there is a quite significant step up in the value that is being provided to the customer. I think historically, what you see is that there is a good correlation between particularly the throughput improvement and the ASP improvement. You know, with the mechanism that we have to share a value on a very fair and equitable basis with our customers, I think it's fair to say that to the extent that we're able to continue to drive improvements as surfaced on the roadmap, that will lead to, you know, significant improvements in ASP as well. On High- NA, I think, you know, the price for the tool that will go into high-volume manufacturing, so the 5200 as per the roadmap that Christophe presented, the price tag that we're looking at is significantly higher than EUR 300 million. All right. Well, over here we got Christophe. Capacity. On the EUV, this says 70 EUV tools per year by 2025. Is this only the 0.33 NA technology? Yeah, I think, this is indeed for 0.33. I think we mentioned 70 a few times. This is always related to the demand we expect. I think this was also shown clearly by Roger Dassen. I would say 70 is not a max capacity per se, it's really what we think we may need today in 2025. Of course, this is something we will continue to watch. I think we mentioned all of us we are in very close contact with our customer. We will do what it takes in the end to meet the customer demand. On top of that, I think this was a bit in the video at the beginning. I think you have seen that we started to build the capacity also for High-NA, and indeed this will come on top of the 70 we mentioned. Yeah. Very good. Switching to Deep UV, Ron. How much is your capacity for Deep UV machines? How much capacity do you need, maybe on a long-term basis? I guess long-term not defined here. We talked 2025. We talked 2020, particularly Peter was tend to talking 2025. I think in my presentation I talked a bit, let's say on shorter term, let's say 2022, 2023. That was a combination of the capacity in terms of machines going out of the factory, and I would say the throughput increase that we provide on our machines. We came to a number of about 1.7. I think, Peter, you mentioned in your presentation to 2025 about a number of two. I think another checkpoint is actually what Roger presented in his presentation in terms of the scenarios that you saw in 2025. There you saw numbers actually also in terms of underlying what the output numbers are there. I would claim that about, in that, in my 1.7 it's about 35% coming out of the number of systems and 35% coming out of the, I would say, of the throughput increase in terms of the systems. I think that's also taken into account over the, over the period of the next years. Very good. Martin, yesterday ASM International said 3D DRAM could happen in 2026 and will lower expensive EUV steps. How should we think about EUV application in DRAM as the industry moves to 3D DRAM? Will it become like the shift to 3D NAND where Dep and Etch grow in intensity while litho intensity is lowered and only relegated to greenfield? That's to me. That's to you. Yeah. I think I like to refer very much of the public statements of our customers rather than its suppliers. In our discussion with customers, we have a broad range of requirements on DRAM. In that discussion, I think the 3D requirements are not having space yet. We know, are aware of publications on that, but the difficulty getting to a transition from 2D to 3D is at least very uncertain on the timing. It's not highly visible on the roadmap discussions we have with our customers. If it happens, there is also not a single embodiment today. I mean, you see different inventions being announced around 3D structures. It's also not clear to what extent we will have different lithography requirements. It's not exclusive that our advanced lithography may also be applicable to 3D over now. For now, as you can see, as an example, as a public announcement for Micron, recently, Micron changed to EUV in 2024. Why would Micron announce it if they would go to 2026 into 3D not needing EUV? There's still quite some discussion on when this could happen, if it happens, and if it happens, what will be the lithography requirements. Okay. Clear. Maybe this is a question for Roger or Wayne, but has to do with services. Do you intend to apply the services billing strategy that you use for EUV for the DUV business? Maybe it's Roger and then Wayne or Ron, you can all comment on this. Are clients willing to accept, and what are the impacts according to you on services, revenue growth and profitability? Actually, I think it's for you. Yeah, I think for DUV, we showed what we expect the install base revenue to be over a 30-year horizon. It's about 130%. I think that's a good number to focus on for both the service of the scanner, the laser and the optics, and in addition to that, the upgrade. I think 130% is a good number, and that includes moving towards more value-added services. Yeah. Clear. We said this impacts according to you on services revenue growth and profitability. I think you talked [crosstalk]. You shared that, right. Yeah. The other one, Roger, that was asked was, can you provide some explanation for growth in CapEx and R&D through the 2025 timeframe as well? Should investors expect each to grow more slowly, rapidly than revenues or gross profits? You mean beyond 2025? It says to 2025. Through the 2025 timeframe. Yeah, until the 2025 timeframe, I think it's pretty clear, right? Yeah. I think that was part of the presentation that we gave. Yep. In the model all the way through 2025, we said that, you know, R&D, we, you know, in the, at the midpoint, you're around to 13%. CapEx, we had at EUR 1 billion. You know, from that vantage point, you could say that they're actually going a little bit down as a percentage of revenue in comparison to what we had. In all likelihoods, you know, if even though we don't present a model beyond 2025, but at a certain time you would expect some leverage from the scale that you're getting. Yeah. Okay. Makes sense. Peter, this is, do you see or do you foresee ASML could later ship EUV machines to Chinese chip makers? How do you assess the geopolitical uncertainties ahead for equipment makers? Well, I think the EUV question is on the table. It's with the Dutch government, I'm not going to preempt any discussion that or decision that they will take. I can give you the No, I cannot give you the mobile number of the prime minister, of course I will not do that. That is at his desk. Yeah, we'll have to wait. I think, generally, I had a discussion, as you can imagine, I have a lot of discussion with customers of late because of the current situation, a very high demand for semiconductors and semiconductor equipment, also lithography machines. Actually one of the customers said it was actually in need of 28 nm capable machines, which of course we have, we're short of everything, is that basically we need 28 nm because, you know, we need to invest. Because 28 nm is for ADAS, it's for advanced driver assistance systems. We need that. The automotive industry needs it. Well, you know, if we really look at who's investing right now, and it's Deep UV immersion, it's not leading edge, it's the Chinese. Actually, we as an equipment industry, we need to ship to at least those customers that are actively building fabs and provide the world with not with EUV-related technology, but with mature technology that we all need on a day-to-day basis. I hope, you know, that will, and I, there's no indication that it is not the case, but I think that's why I would think and believe that that will simply continue because the world needs it. Yeah. Yeah. Yeah, Yeah. Yeah, makes sense. Next one is, I guess I should have finished. Wayne, there was another one here that we had on Deep UV. You mentioned the 130%. The question was, and maybe it's also Christophe here, but would EUV look different under the new service models? Would it be more comparable? What would be a similar figure for the EUV tool lifetime? Install base revenue is expected to be about 5% of the equipment price on an annualized basis, so that would take it over 30 years to be 150%. A bit higher than DUV. All right. Clear. Thanks. Roger, Martin's presentation seemed to suggest lower litho intensity of 1.5 nm versus 2, talking about the nodes, N1, versus 1.5 in the key logic market. Can you comment on how this might impact your revenue? I don't think that's what Martin's presentation said. I think what Martin's presentation said is that at 1.5 nm, Martin said the number of layers goes down and the number of exposure goes down as a result of the fact that High- NA kicks in. That doesn't mean that litho intensity goes down. As a matter of fact, it doesn't. As I've demonstrated in my model, you see, you know, the node on node transition. You know, litho spend as percentage goes up. I think that's a misread of Martin's slide. Martin's slide very clearly shows a decrease in number of layers, but that's as a result of High- NA kicking in. More expensive. Yeah. Of course, that's where the value for us is. Spend. Yeah. It's a misinterpretation. Of course, for the customer, it is of value because it reduces the number of layers, it reduces complexity, it avoids, you know, triple, quadruple patterning on layers, et cetera, et cetera. Yeah. Very good. All right, Jim, I guess you don't get off here, so we have you on here. Can you please provide your market position, market share, and key competitors for the four market scenarios and applications that you presented? Sure. The four market segments that I discussed, we'll start with the scanner and process control software. That obviously goes hand in hand with our very strong scanner position. We would consider our market share in that segment to be about 90%, market position number one. Second market segment would be computational lithography. We consider, we measure our market share as at about 50% of total market share, and we would also consider our market position as number one. Competitors there are Synopsys and Mentor Graphics, which is now part of Siemens. Third segment is optical and e-beam metrology, and in optical overlay metrology, we have about 50% market share of that total market segment. We're much stronger on, as I mentioned, on immersion and EUV critical layers, less strong on image-based overlay for lower-end layers. Key competitor there is KLA. The second part of that, the E-beam metrology part, I would say we are in the range of 10% or so, 5%-10% on E-beam metrology, and the competitors there are Hitachi High-Tech and Applied Materials are the main competitors. We're probably three or four in that segment. The last segment is high-resolution inspection, which we define as a combination of the single-beam inspection or E-beam inspection market plus the high resolution portion of optical bright field inspection, where KLA is very strong, and mask inspection, we also include in that TAM. If you put all of that together, HMI is about, again, about 5%-10% of that market segment. And the competitors there, again, are KLA and Applied Materials are the key competitors there. Ballpark numbers. Yeah. I think that gets to the gist of the question. Yep. Yeah. Perfect. All right, thanks. Christophe, maybe can you please elaborate on how many High-NA systems you are planning to operate at your facility in the beginning of 2023, and how many machines you are planning to ship to your customers in 2024 and 2025? On the first question, we always at ASML plan to have a couple of machine basically initially to develop them, to qualify them. In 2023, we will have a couple of tools at ASML. For the first time, one of this tool will be available for some of the time to customers. If we look at the number of tools, it will be two. About, let's say, half of the system may be available for interaction with a customer. On the shipment curve, I think I talked about two High- NA model. The first one is the 5,000, which I describe as a R&D system. There I will say we plan to ship maybe five, six of those tool to basically meet the R&D need of our customer, and this will happen for most of it in 2024. After that, we will shift towards high volume manufacturing system. We expect, of course, as a result to increase the number of shipments. It's still difficult to have an exact number. Typically, you know, we'll ramp this tool most probably, I would say, doubling the capacity for the first two, three years maybe. Okay. Clear. Peter, you mentioned we structurally underestimated capacity in the last few years. What did you change this time to build your capacity model not to make the same underestimation? Out to 2023 beyond? Yeah, that's a good question. I mean, a good answer, gut feel. You know, that's basically also part of it. Now when we go back to 2007 for the first time when we did our scenario setting, yeah, our scenario goal setting, and I look at the reference case at that time, and the reference case in later on, we did it for the second time a couple of years later, and now for the third time we've done it for 2020 and 2025. I think the first time we did that, we actually were as one year earlier, reached that scenario target. The second time we did it, we were two years earlier and, you know, we will be a couple of years early on the 3rd time that we did that. You could say, "Why didn't you guys learn?" You know? You've now 15 years' time to get your act together. Every time, and we're not the only one, I mean, when we look at the capacity that's been installed by our customers, it's also not enough because we only ship what our customers want. It's somehow we continuously structurally underestimate the power of semiconductors and the application of it. Thank you. Yeah. That leads to all kinds of services and products. I like this Qualcomm slide because it actually shows, in this icon, shows all these different areas where this distributed computing takes place, which of course we never really got right, yeah. When you look at this underestimation, and you could almost say this growing underestimation of the capacity, we intuitively then said, "Okay, let's follow our model." Roger explained our model quite clearly. You know, growth rates that we align with analyst firms, and then we look at the roadmaps and we start thinking about wafer demand and about our tools, and let's use that same model, yeah. See how we underestimated this, and then we come to a conclusion that we need to build more, and we will build some overcapacity as compared to that model, yeah? We also think that we might need our spikes, that we will need that overcapacity where we will not be in a situation where we are today, where we simply have to say no. Also, you know, some of the uncertainties. We talked about the technological sovereignty drive or the reshoring. We don't know how much inefficiency that's going to create, but we have to make sure that we have some additional capacity above the numbers that Roger mentioned, yeah? Again, it's also a matter of what Ron said. It is the number of units times the productivity per unit, yeah? It's the wafer capacity that we need to be able to ship. It's, yeah, I cannot give you an exact number. We are looking into this right now. We have a couple of scenarios, but we will build some more capacity than the numbers that Roger gave. Yeah. Okay. Thank you. Ron, this is on Deep UV. Can you explain the cannibalization of Deep UV by EUV being less than you predicted a few years ago? Is this temporary due to the current chip shortage or relatively permanent? No, I think in, I think it also connects to what Peter was saying in terms of our modeling, what's happening there in terms of the, I would say, the stacks of our customers. I think we underestimated their, what the content of Deep UV is. I think that's basically what the issue is. I mean, Yes, we try to get a site also by the interaction with the customers to get a view in terms of, well, this is about what's happening to our best knowledge. We are not making chips, so we always are there in terms of making our estimate in terms of what's happening there. What you see is, yes, certainly for the node further away, I mean, our guessing is bigger than the nodes which are closer to current, let's say, operation. There you see that, I would say the divergence in terms of our prediction and what's happening was getting bigger. I think that, yeah, I would say, positive, on a positive note, the result being indeed that the demand on the Deep UV side, on immersion side is higher than what we expected. All right. This is Christophe or Roger. Will your gross margins of your Low-NA EUV systems continue to improve with future iterations of EUV systems as we go from D to E to F, as ASPs increase and you share this additional value, higher productivity imaging overlay with your customers? Or is there a natural limit to EUV gross margins? Well- Roger. Yeah, I can start with the technical part at least. Yeah. I think, Martin also covered that. I think, you know, as long as we know or we can, improve the performance of the tool, starting with productivity, but also overlay, I think by default we will, improve the value of the system, and as a result, most probably also the profitability. That's one part. The other thing, I think it was shown a few time, by Wayne on the service cost, I think by Roger on the overall service, we are driving our cost down, as much as possible, which is of course another way for us over time to also have a second, knob basically to improve the profitability. I think as long as we drive those two things aggressively, and as long, of course, that the resulting value is there for our customer, I think that there is still room to improve, of course. Fair. Good enough? Yeah. Okay. Wayne, this was asked, does install base management have a subscription model, and what percentage of sales at install base management is recurring? I think it's more of a question on, you know, how much of it's consistent contract versus- If you look at our install base for NXT systems, all of those tools are under a full service contract. That is something that typically every three years we negotiate with a customer and move forward on. This is as we move forward, we're looking at more value-added services and getting that into the contract, so we can also be incentivized to drive more good wafers per day and not just focus on availability. That's on NXT. On XT, we still have about 90% of the systems that we have a service contract, and we're moving more of those back into full service, but that's kind of a work in progress. On NXE, we have all of our tools are under a full service contract as well, and that's also something that we negotiate, about every three years. Yeah. Very high on NXE. NXE is all of our systems. Yeah. NXT, all of our systems. XT, a growing amount of our systems are coming back into a full service contract. Yeah. Okay. Clear. Peter, does ASML have pricing power? We saw several customers increase their price offering. Is ASML considering a price increase? Well, most of our contracts with customers are long-term contracts, and we just honor those contracts. We price the tools, and I think Christophe referred to it, based on the value that we and our customers believe the tool has, and that's the price. You know, I think particularly important in a situation where our customers are, with respect to high-end immersion and EUV, basically dependent on us. It's 100%? When you have contracts and then long-term contracts and you're the only one, and as you also know that our strategic priority is customer trust. It doesn't jive with just breaking open one-sided contract and just cranking up the price. I mean, the price is based on the value of the tool. Some customers would also argue, yes, under the assumption that we deliver full value, in other words, also the full uptime and everything that goes with that. Well, we all know that, you know, we're still in a maturity ramping phase, so, you know, they would even argue that we are already overpricing. Yeah? Yeah. It is what it is. We do value pricing. Okay. Martin, I can't ask a clarified question here what they exactly mean, but it says, "Will it be possible to develop technology at ASML that allows for picometers instead of nanometers? I guess seeing customers. Well. Moving to angstroms. Yeah. I think Christophe already explained in his presentation that it left it out. Although the accuracy, the mirrors are being polished and I think Christophe refers out of a recent result we had achieved with our High- NA production, where we were for a long time exposed on what accuracy we could polish those mirror, which is very critical for getting our specification. And we just had last week a celebration of us getting the 20 picometer baseline. 20 picometer, that is 0.02 nm. So we are already in picometer regime. This is also the challenge moving forward, when we drive productivity to make sure that with the increased intensity, we are maintaining those picometers during operation of the system. So we already challenged with that level. Okay. That was the human hair stretched across the entire Earth. Great. Okay. Let's see, the next one. There's another point here. Yeah That, you talk about the human hair. I sometimes skip it because I felt that no one of us have seen a picometer or a nanometer. Certainly when we join this company and everybody's on time, you think you know what the nanometer is, you don't until you start trying to drive it down. It's a kind of a magic measure when you go below 1 nm. That magic happens. Sometimes it happens. Yeah. On my iPad, I have another question for Ron. It was before I went blank. I think I need another one. Yeah. It was the on 200 mm, how low can the technology go, and can it continue to scale with 200 mm immersion? What do we in practice see? Those are for the 200 mm systems. What I said, particularly we target the XT platform, which means that if you look to current resolution, it's effectively given by what ArF is doing there. Out of my head, I think we're talking about, what is it? A 65 nm there. Keep telling her. He's popping up with that. In that area. Let me put it that way. I'm missing now because of all this, I'm missing the question actually. Yeah, the question was on 200 mm, how far? Oh, you told me. Yes. Can we push the technology? It will emerge and enable it to continue. Can you go all the, you know, down to 7 nm on 200 mm, for example? No. Good, good point. On the XT, I was referring to that in terms of coupling the 200 mm there. I think, because we have experience let's say on the XT platform, also in immersion, if this really is a hurdle, yes, we can also look there, to there how to break that hurdle. I don't see a fundamental issue there in terms of going to better resolution in 200 mm. What we see in practice is that particularly if a, let's say an application is there and doing that scaling, then usually it makes sense actually to go to 300 mm. Leave the 200 mm, wafer size, go to 300 mm, and then you come, well, let's call it the mainstream in terms of litho machines. You effectively end up there. Gotcha. You can scale, continue. Yeah. Yeah. It's not a wafer size, is not the gate. They can keep going. Correct. In practice, maybe they don't always do that for other reasons. Yeah. Martin, this is a question to you. What is the impact of the move from FinFET to Gate-All-Around on litho intensity? On litho intensity, sorry. Is the introduction of the Gate-All-Around the reason why 2 nm and 1.5 nm nodes have the same mix of litho tools? I think we have not consummated the Gate-All-Around yet. It's still in process. We base ourselves on the roadmap. I think the layer assignment I showed in my presentation includes the expected Gate-All-Around change. Whatever that is, it's included. We don't see an immediate negative or positive impact on Gate-All-Around. Although it's true that these Gate-All-Around structures, most embodiments, also there are various variances there. Those structures are mostly likely built with advanced processing tools and are 3D kind of structures. Okay. Wayne, in the install base management, the company talked about increasing collaboration with customers to drive better productivity and availability. How should we think about the opportunity for DUV service to transition to a more outcome or wafer output-based service model similar to EUV? Is this something that customers are interested in? Customers are definitely interested in anything we can do to work with them on maximizing the wafers per day, whether it's on DUV or EUV. We are moving toward a model where we are being incentivized for additional wafers per day beyond the classic E10 availability. We are moving in that direction across our NXT fleet. I think that customers are open to that. We have to make sure we're delivering a service product that is cost-effective and that we're adding value and adding that good wafers per day. I think given the economics behind it that I described earlier, I think customers are very open to that. Okay. Good. Roger, what is the time from the shipment of an EUV High- NA machine to revenue recognition? That's a really good question. Had I known that, I could have been more specific in my 2025 model. There's a number of dynamics here. One dynamic is obviously. You know, going back. Accounting rules say typically you take revenue at a point in time that the customer accepts it at its side. That's the starting point. If you can demonstrate it, in fact, when you have the factory acceptance that's done at your own premises, that then the installation at the customer site is more or less perfunctory, it's just a formality, then you can actually recognize revenue upon shipment. That's the main thing. The question now becomes, you first need to build up this fact pattern, and that's what we have to do. Of course, then you first have to do it. You know, Christophe discussed with you the shipment plan, so you know when the first tools are being shipped. If indeed that demonstrates that fact pattern is there, you know, then we will be in a position to actually have revenue recognition be done at a point in time that the factory acceptance test is being done. There is still some evidence to be built, but, you know, we can only do that at a point in time where the first shipments are gonna happen. All right. Anything else, Christophe? No, I think it's perfect. Thank you. Ron, there was a question on what's the implication on 3D NAND in litho? Do you see the litho intensity continue to scale there? Martin showed a scaling layer, so I assume the answer would be yes, and we showed 10% from Roger, node on node. For us, effectively what you see is the 3D NAND, also that's, well, part of I think also the modeling. The lack of insight in terms of the customers are doing. Actually, we see that the content there in terms of litho has been increasing, particularly if you look to the KrF side. Actually, we expect that to, well, probably that, let's say the speed that has been increasing probably is going to stabilize or be lower, but certainly it will grow over time. The layers there, the amount of layers increasing, yes, will have also a positive effect on the litho side. Okay. I have maybe, we have time, I think, for one last question. This is kind of a longer term. The question was, the smallest node in the presentations, this is maybe a good finishing one. The smallest node in the presentation was 0.7 nm, somewhere far in the future. How far can you scale down with multiple pattern, multiple patterning on High NA EUV, and what will be needed once High NA EUV has reached its limit somewhere in the 2030s? Yeah. I'd like to start connecting with what Ron just said about 3D NAND. When 3D NAND started, we thought, you know, this is the litho intensity, and it's not more, not less. What turns out that depending on the process integration, the customer may decide to put the logic under the array, increasing litho, and not only increasing litho make also more critical. The aspect ratio of the process tools is limited, so you have to restart litho. We have seen a recent boost that some customers of our litho density and NAND because of the different process integration. Given your scaling up to close to 1,000 layers as being published by some, will drive it. When you talk about 1 nm, 0.7 nm, 2 nm, those are marketing nodes. I did not make this probably too explicit, but in the presentation, I showed the gate pitch, and I showed the node name, and you showed the node name going way more faster down than the pitch. How far could litho go down? I still think, I'm gonna make the prediction that we will even use EUV over time in double patterning mode. Once that's the case, you could ask yourself, is there a need for simplifying again the process layer according to the same logic with Ron? Today in our pipeline, and that is based on the innovation we are developing today in High NA, we see opportunities to extend High NA to higher levels, to higher NA levels. We could even make cost-effective EUV tools with this technology, which allows us to simplify the process of the customer. I think the question becomes gradually not, can we do atom size kind of imaging, but we are becoming more and more the enabler for a customer to keep the complexity and of the process in check and keeping the cost in check. That in itself is a major innovation endeavor, which we'll likely see, let's say, once High NA is maturing, that we will get more and more, how could you, continue to simplify and what tool specification is it? It's not very likely we'll leave the EUV wavelength, but we're still not, totally in the end of the, of the aperture, but we have to be very careful continuing to even more so than the past, balancing, cost performance, the cost performance equation, which already, Ron is doing as we speak. Yep. All right. Thank you all. I think that wraps us up. We're up against our time here. I think, would like to tell everyone out here that we, whatever questions you did not get answered, if you have more questions, please contact the IR team. We'll get back with you on that front to address any questions that will follow. We realize there's a lot to digest. We'll take some time, we can follow up over the coming weeks and months as well. We also have a survey. We'd like to get, again, feedback in terms of how we can improve this event, so we'd appreciate your response to surveys as we submit them. I think with that, I would like to formally close the Q&A session and today's Investor Day event. On behalf of ASML, I would like to thank you all for joining today. I look forward to seeing you all in person soon. Thank you.