Welcome, everyone. Welcome also those who participate in the Webex. Again, I'm very honored to see all of you visiting us in Radfeld, Austria, especially after two and a half years of COVID restrictions, not traveling. We've picked up traveling again in the last, I would say, six weeks. Finally, we're able to meet person to person, face to face, however it's called, and taking this opportunity to also introduce you to our machines. Many of you have followed this company for a long time, some a bit less. We have organized a program, apart from showing the machines, covering our major products. The ones here are Ruurd, CTO. Most of you have met Ruurd. Please stand up. We have Chris Scanlan. Some of you have met Chris in the CTO office. We have Peter, responsible for Engine Two. We have Christoph, responsible for Engine One. Participating from Singapore is Jeroen Kleijburg, who's responsible for packaging. Jeroen will also cover the plating. The program for today is what you see in front of you. All of the information will be on our website, openly sharing that with the public. Let me start with this strategic overview. Leon, why am I only seeing that on one screen? What means the screen next to that? Are we okay? Yeah, we are okay. Okay. All right. Purpose of this meeting is simply to update you on where Besi's business is coming from and where it is heading. It is not about detailed financials, Q2 or a forecast for 2022. Those of you who had expected to get those details, I have to disappoint. Anyway, that's always the purpose for a capital market day. If we just briefly touch on the several key issues here. Besi surpassed its previous set goal of reaching EUR 800 million revenue. Simply with leading margins, I think we will spend some time on where that is coming from. The important message is that this is all coming from businesses with today's technology. Besi has performed very strongly with its current product portfolio in current applications. Very critical is that, not a secret anymore, assembly world has reached an inflection point that it has become, after 50 years, a very critical part of end products applications. We as Besi have focused on the advanced packaging forever. That's been our strategy from day one, and more and more it is becoming more critical into the end product development of front end companies, either IDMs or fabless cons, and that is done simply by technology, ever smaller device geometry and the interconnect becoming more complicated. That's why we proudly say that this world has become more important, and even so, people are saying that this is an extension to Moore's Law. Anyway, a very important inflection point in the development of this company and back-end in general. Next slide, please, Leon. Engine Two, you've heard us refer to Engine One and Engine Two. Those of you who are not familiar with that classification, we have called today's world our core business, Engine One. Engine One responsibility is under Christoph. Engine Two, which contains hybrid bonding, which contains chip-to-wafer, is under Peter Wiedner since first of April. Peter will explain a bit later. He's had a long history with Besi Austria and also Besi die attach in total, and then worked for another company for some time, but came back to join us as of first of April, officially. The Engine One and Two simply refer to core business, die attach, Engine One, and the Engine Two is the next world. You see that here is simply the industry moving from individual dies to more integrated on die level, development of chiplet architectures, and that requires a different environment. You've seen that downstairs, the clean room environment. That's also the reason why we are working with customers who we've not worked before. One in Taiwan is a very simple example, but then gradually moving into front-end because the end product, again, is moving into a complete process from front-end till the final interconnect. Drivers in place for the billion++ model. Last year, we introduced to you the billion model, moving from EUR 800 million, which was in sight, to EUR 1 billion. That is simply following the strategy from a year when we moved from EUR 300 to EUR 400 to EUR 600 to EUR 800, and now to EUR 1 billion++. Clearly, the next cycle should drive our Engine One business, and Christoph will share some more about those drivers, in particular, to the EUR 1 billion mark, and then the plus plus is the Engine Two part, of which we also have an update on the model. We currently see the progress, the model of last year. Next slide, please. We are in a cyclical business. Many of you, not only know that, but also are very much excited about that as we are. We simply see basis revenue going back to 2006. We also see the margin development over time. It gives you several messages. One is, don't be surprised that after two enormous growth years, that we are currently in an environment that many people are convinced that the peak of this cycle is over. At the same time, you see these nice cycles, two, three years, four, eigth quarters, depending upon many, many factors. The second message, even more important, is that Besi's market position has improved dramatically over all those years. Our focus on advanced packaging, our focus on developing an operating model which can faster react to industry demands, so shorter lead times, but also enormous flexibility in ramping when the industry needs, but also having low break-even levels when the industry has no need for equipment. That maintaining margins which are well above the average of this industry. Next slide, please. If you look at these numbers, and these are fresh, the latest numbers from VLSI Research, which is now called TechInsights. You see 2021, 2020, 2021, 2016 comparison, and you see in the overall assembly market, supposedly our percentage share has increased by 1.2 points last year, which in an enormous growth year is a lot. That's not a surprise because in most upturn years, if you go back to 2017, to 2014, we have always enjoyed more of the upturn in upturn years. That's not surprising if you look at our margin development. If you look in more, a bit more detail, the addressable market, even an increase a bit more than on the overall market, and then an enormous growth in die attach, now over 40%, 41.9%. Then in packaging and plating, roughly flat. These are first-round numbers which we received only a couple of days ago. We still have to verify that a little bit, but the key message is clear to everyone that Asia has done well in this current cycle. Next slide, please. We see that here also in some nice circles. If you look at the overall addressable market in 2021, EUR 2.4 billion, of which 33% is where we are focused on. Then the die attach part, the packaging and plating part, and then more critical, but that is also consistent with previous years. In the advanced die placement, we supposedly have a market share of around 75%. That also simply confirms our lead in whether it's flip chip, but also now in the hybrid bonding space. Next, please. What we see here is strong financial support. I won't spend much time on that. Enormous cash generation that also has led every year to a very shareowner friendly share buyback and dividend policy. Anyway, next. We see that here in some more details. Believe it or not, since 2011, 25% of our cumulative revenue has been distributed to shareholders. Anyway, next slide. Strategic initiatives 2022. What we did last year, end of second half of 2021, we have updated our strategy to reach out to 2025. We spent 18 weeks with our entire management to define where we have to go. In this process, we also included 50 customer individuals of our top ten customers to engage them in basic strategy. One of the key decisions was to focus on the core business, the Engine One, and set up an entire organization for the Engine Two. To avoid the risk of cannibalization in one or the other. In order to do that, we took the whole organization along, and that has resulted in a very solid plan 2025. Underpinning our ambitions to reach a EUR 1 billion plus, plus model. What's key, of course, is not only the beautiful products, but how you build those machines. I've explained to many over all those years we've learned, one of the key differentiators is to build those machines in such a way. Somebody asked in our presentation, "How many hours does it take to build an EVO?" 100 hours. Our Swiss epoxy machines are less than 60 hours. We can deliver those machines in 24 months, sorry, in four weeks to our customers. Four weeks, mind you, which is critical to an industry which is highly cyclical and unpredictable. The one who can deliver the fastest wins. At the same time, build a model which can ramp with this cyclical model, but at the same time, when the industry goes down, that we don't end up with enormous inventories. We do that by dual sourcing, triple sourcing. We spend equal amount of time on developing of our equipment and further developing of our operating model. That's enormously important. In these past two years, in the COVID years, we've learned a lot about our suppliers individually, how they coped with the effects of COVID, and we had to qualify all of a sudden, any additional suppliers, because some were not able to deliver. That has created even more knowledge about our supply chain, how we manage those suppliers. As you quickly also see, we have already expanded our capabilities in Asia to be able to meet the EUR 1 billion plus model. To be ready on time. Then, of course, the development which we will spend a lot of time on in a moment, and then the organization is ready to really build this enormous opportunity in the EUR 1 billion plus, plus model. Next slide, please. What we see here is the quarterly development of revenue and orders, simply as our latest information. I won't go into much detail. I will only have one comment here. Our baseline operating expenses are very much under control, simply because it's all cost and we want profit. Next. What's currently critical, I think this red one needs to be even a bit bigger. If you look at stock markets in the last couple of weeks, especially the last days, headwinds are definitely facing our world and our industry in particular. Everyone is losing confidence in a way that will growth be stagnating? Will we have major recessions? Many headwinds. On the other hand, we also always are very positive. In technology land, in bad times, it only becomes more interesting. More focus on either extending existing technologies by a lot of developments in many applications, because it's all about cost. Then the new technologies emerging, like for instance, the hybrid bonding, and that is definitely the case in these times. For us, very interesting in a very positive way. We always benefited from difficult times. If I look back in the history of Besi, now 29 years ago, next year, 30 years, we have always had enormous progress in industry cycles. Next, please. That completes my few words. Again, focused on the model in the last 12 months since our update last year, although virtually, it's become much more, let's say, visible that we can reach this because of the success of our products, and especially the adoption rate of hybrid bonding. If we look at our addressable market, we have simply this goal to reach from the 30s for many years to climbing up to the 40 bracket. Gross margins within the range of 58%-62%. That leads with cost under control, OpEx in particular, to net margins which are somewhere in the mid- to high-30s range. Asia, what you see here today is development, is prototyping, process development, but all the machines are built in Malaysia and also in China. China for China, Malaysia for the rest of the world. Of course, we have strict targets for all of our ESG. One of the beauties in this building, you may have seen that downstairs, the contribution of solar panels on the roof. By the way, these solar panels are built with Besi machines. Contribute in a day like this when it's 29 degrees, the sun is so out, maybe 50%, but that's a good start. Anyway, we have that also on the roofs, in the buildings in Asia. But also energy, et cetera, less travel, less footprints. We have a simple target, maybe for you also interesting to know as a sidestep. For everyone in this company, going back to traveling again, maximum 50% of what you were traveling pre-COVID. Anything above that needs top management approval. Simply as a target, one of your personal KPIs, to travel less, because in the last two years, we have managed this business without travel. There are many other goals which are everywhere in our annual report. Next, Leon. Thanks very much. Ruurd, stage is yours. There you go. Yeah. Thank you all. It's. First of all, nice to see everybody in person again. Some new faces, of course. Richard already mentioned, it's amazing that in these two years we simply were able to keep things rolling. The world has changed substantially. We said 50% travel level of before. I must say, I was in the States already. I came back yesterday from Dresden, so I think I have my 50% now, Richard. I'm done for the rest of the year now. Let me go to the slides. Yeah. I'm the CTO of the company, for those who haven't noticed yet. I was yesterday at the 3D conference on 3D technology in Dresden, and they showed the graph starting in 1984, which you see here. That was the year that personally Richard started with Besi, and I also started. We started together at that time, but not with Besi, with a lot of the in the semiconductor industry that ASML have started. It's amazing how this industry has developed. Now today we have this fear of things go down and so on, but I must say since 1984 I've had many times these remarks. Richard and myself, we always get nervous if people say, "This time it's different." It simply is not. It will stay like this. The overall curve in the industry has never been as healthy as now. What we see is a proliferation of semiconductor devices in almost anything you do. I mean, who of you has an electric lawnmower? Oh, nobody has a lawn anymore. Even there, you have electronics in it. Your drilling machine everywhere. It's everywhere. You see this enormous growth in the coming years. We are not afraid for the future at all. We think there's more than enough opportunities. Yeah, we expect that the semiconductor market will basically double again in the coming 10 years. It took 30 years to go to here, 40 years almost, and now in the coming 10 years, we almost expect it to grow much, much faster than that. Maybe the next slide. This graph we always use to explain a little bit, where are we? This is the temperature curve from, now it's called TechInsights. It was VLSI in the past. If we are below the green line, we are in a down, and above we are in a growth phase. You see we are still in a positive territory. The trend is going in the wrong direction. How this will develop, we have these discussions. I've made graphs saying, "Now we have 8 quarters, now it should go down." Yeah, we have to see, and Richard already indicated it is difficult to estimate it. There's a lot of uncertainty in the market, and that's something you don't like in general. Maybe the next slide. What we're also seeing is that the CapEx increase is still tremendously. What is important in this graph here is that you see that these top players are really dominating more and more the industry. If you see the investments that the TSMC, Samsung and Intel is planning to do, say the top five, it's amazing. Our goal over the last years has been we want to, what we call, pick the winners. That's our key element of our strategy, be on board with the, I would say, the top players. That has been a focal point for the last years, and that has worked out, I would say, quite well. We are now on board. We have equipment placed in all these locations and, yeah, that's possible. What's also remarkable in this graph is that the strong growth of the advanced logic and foundry business, especially the high power. Chris will tell a little bit more about it, but that's also favoring for our business. Maybe next slide. Yeah. Here you see and most of you have probably followed that there's a lot of announcements of new fabs. Now, at the end of the day, you have seen downstairs now silicon wafers and material, but if you can't handle this and bring this into a package. It's no use. This will also imply that there will be much more capacity needed also for packaging, which is also a very positive development. These are developments that will come online in the coming years. I mean, if you announce a fab now, in three or four years it will be there. That bodes very well for the, I would say, the midterm future for us also. These amounts are very serious. There are also more spread out now. Geopolitically, I don't want to go in anything there. It's a dangerous area to go to, but the world is changing, and we see more focus now bringing things back to the US, bringing up in Europe. I personally believe Asia will stay very strong. It will not change dramatically, but things will start moving a little bit. A lot of capacity build up, that's very good for us. Next slide. What we also see in this slide is that the capital intensity for our business has made a jump. Typically, it was $3 billion to $4 billion. If you take in percentage, you have so much semiconductor sales, you need so much equipment. It was 3%-5%, maybe 4%, typically that range. Now it has made the jump to the five-seven, maybe even better. We see really a change in the performance because the packaging part, and especially the advanced assembly part, becomes a bigger part of it. For those of you who have followed ASML, for example, they have in their presentations now also packaging as a key element. What you start to see is this momentum from companies like AMD. With this advanced packaging, they are able to actually get almost the same or even more performance increase compared to going to a next node. That's new. That is really new in the industry. This is a good development for us also. Next one. Now, this is a little bit over. In history, we had a little bit of dip in around 2020. It's picking up now, tremendously, and that bodes well for us. Next one. Yeah. This is also what is important for us is that our addressable area, especially in the die attach area, is growing more and more. It's actually growing more than the rest of the market because, again, these elements that we try to operate in are. We look carefully for the most attractive areas. We typically look for the higher value propositions that are needed. That strategy has worked out. We started with that 2008, 2009. That has brought us very far. Yeah. That was it for me. Chris will now take over. Chris joined us. You can tell us then. Yeah. You had already one last year. Yeah. Chris joined us, much more focused on the process technology, and I'm happy I paid it. Yeah. All right. Thanks, Ruurd. Hi, I'm Chris Scanlan. I'm an SVP Technology at Besi. I'm relatively new to the company. I've been with Besi for about 18 months only. I spent the last 25 years prior to this working really on advanced package development, mainly in the OSAT industry. It's really a customer of Besi, so I kind of bring the end user perspective. I have a master's degree in material science and about 70 patents all related to advanced packaging. I'd like to talk about our end user markets and what are some of the things that are driving growth for our company and opportunities for our company. If you look at our end user markets, it's still mobile as the dominant market segment, and it hasn't changed. What we really see is computing and automotive starting to become more interesting and growing more rapidly. With the rest of my presentation, I'd like to provide some insight and examples on what is driving growth in these different market segments. Next. If you look at the application drivers that we're seeing our customers focus on and work on, I think it really all at the moment revolves around the data center and AI. We're seeing explosive growth in high-performance computing in order to just handle the massive increase in data that is being generated, processed, and acted upon. This is all being, you know, fed into AI models and trained and used in by other end applications to take action on that data. We're also seeing new communication technologies. 5G is rolling out, and we're seeing customers now start development on millimeter wave and the next generation of communication technologies. Also automotive, EV, and autonomous driving. So many application drivers, and all this requires more semiconductor content with more advanced packaging. Next. Let me focus in on computing since this is really one of the major growth drivers for us currently, especially with hybrid bonding. This chart on the right is showing the explosive growth that we're seeing in cloud infrastructure, CapEx by the major companies that provide data center services. This is also reflected in the foundry market share in terms of their end markets. We saw for the first time last year, computing actually exceeding mobile in terms of foundry revenue. We expect that will continue to grow at a faster rate compared to mobile going forward. Now, these computing applications are becoming very dependent on the trend of chiplet assembly technologies. I'd like to spend a minute talking about chiplet assembly technologies. Next. What is a chiplet? Well, basically, a chiplet is the concept of taking what used to be a- Chris. Yeah. Can you speak a little bit louder? You can't hear back there? I'm sorry. I can hear air conditioning. Oh, the air conditioning. I'm sorry. Okay. Yeah. Chiplets are the concept of taking a system-on-chip device that used to be a single chip and breaking into multiple smaller individual chips and recombining into a package. Why is this happening? Fundamentally, it's because we're seeing a slowing of Moore's Law. Moore's Law is the idea of doubling the transistor content on chips every two years. Right. Because transistors are now getting so small that they're approaching the size of a silicon crystal, it's really hard to scale them any further. In fact, some functions that are included in the chips, like analog and SRAM, are already kind of at the limit where they're not scaling with the next node transition. Therefore, chips are simply getting bigger in order to provide the same functionality, improvements for each generation. The solution then is to split them apart. Take an SoC, break the functions into different multiple chips, and recombine them into a package. When you do that, you need really high-density interconnections between those multiple chiplets. That's what's driving the transition to this chip-to-wafer die-attach, like hybrid TCB and so on. This is one example in the lower left, Intel's Ponte Vecchio. This actually has 47 individual chips assembled into the same package in order to make this device work. If you look at it from the top view, you don't see 47 chips, but this is a 3D assembly. There are chips in the substrate. There are multiple levels within the package. Next. This is a kind of conceptual view of what these chiplet packages look like in a high-performance computing space. In any given package like the one I just showed you'll see multiple different kinds of interconnects. Hybrid bonding is the most topical interconnect, newest technology. You can see here 3D chiplets being bonded together using direct copper interconnects. That chiplet then has to be still assembled into a system, into a full package. We still have flip chip bonding, TCB, and other interconnect technologies that all have to come together to make these packages work. At Besi, our vision is really to offer a full solution that can support the assembly and manufacturing of these very complex packages. That includes thermal compression bonding, hybrid of course, the TC Advanced system, and so on, that we showed you downstairs, for those of you that are here. Support, you know, advanced flip chip and memory stacking. Bridge attach is a topical item. We even have wafer level molding. At the end of the day, this entire assembly has to be mounted to a package substrate. We can do that with our Evo platform that we showed earlier. Next. Hybrid bonding is really at the heart of this next generation of chiplet adoption. Why is that? Hybrid provides a direct copper-to-copper interconnect. Instead of having a solder interconnect or in the old days, wire bonds, we now have a direct copper-to-copper interconnect between the final layers that are manufactured in the wafer fab. It's done at very, very fine pitch, so we can get down to 9 microns today, and in the future, down to 1 micron or less. This gives designers really unprecedented capability to perform these high bandwidth, high-density chip-to-chip interconnects. They can really think about their system design in a completely new way. They have flexibility now to integrate multiple chips with different nodes, with design tools and with electrical performance that kind of emulates what they used to do in the back-end line in a wafer fab. It has to be done in a wafer fab environment with extreme cleanliness as well and extreme accuracy. When you pull it off, what it enables, as Ruurd mentioned earlier, is really lower cost of ownership for a given performance level. One of our customers has told us, for example, that using hybrid bonding to add, for example, SRAM to the back of a CPU chip provides a greater performance jump for a lower cost compared to going from one node to the next more advanced node in the front end. Next. Next, I'd like to share one or two examples of how this technology is being used today. The first product that's shipping in production using this chip-to-wafer hybrid bonding technology is the AMD line of CPUs. It's built on a chiplet they call the Ryzen CCD chiplet. The way it's built is they have a CPU-based die, which you can see on the lower right. That's the bottom die. Onto the back of that, they use hybrid bonding to assemble in a face-to-back manner, an additional SRAM chip. Side by side those SRAM chips, we actually have two pieces of blank silicon. Those are also assembled using hybrid bonding. This is a point that's often overlooked. In this one little chiplet, we have one flip chip attached up to the substrate and four... or three hybrid bonding subs. Next. AMD's first product with this architecture is called EPYC Milan-X. In this product, they have eight of these chiplets mounted to the substrate. In addition, a center I/O chip that services all those eight CPU chiplets. Next slide. Another configuration, they've optimized the same chiplet architecture for the gaming space. Now they're only using one of these chiplets, but it's the same exact chiplet design in combination with a different I/O chiplet. With this, they can service two completely different markets with the same exact CPU chiplet. This gives them, from their perspective, really unparalleled capability to tailor and combine these things in different ways at a low cost from the point of view of mask sets and so on, to be able to service different markets. What they can also even do is omit the backside component and ship just the base die at a lower performance level at a different price. They really can offer a much higher performance product at a very attractive price point. Next. I'd like to comment on how this affects our business. This is an example of, again, using the AMD EPYC product as an example of how these architectures are progressing. In 2017, they first introduced the EPYC processor, and this was actually the first one at that time that split a single CPU die already into 4 separate die. Those 4 die were identical and attached to the substrate using flip chip bonding. Four die placement steps. Next. 2 years later, they introduced the second generation. In the second generation, they truly adopted a chiplet kind of architecture where they have two different nodes. The center big die is on a less advanced node, and they have eight of these CPU die that are on a more advanced node. Nine total flip chip placement steps in that generation. Now if you look at 2022 with this third generation EPYC that I just described, from the top view, it looks very similar. You still have the nine flip chip die attached to the substrate, but each of those small chiplets also has the three additional hybrid bonding steps, maybe some other intermediate steps. There's more than 30 die placement steps in that package. You can see in the course of only less than a decade, we've gone from one before 2017 to more than 30 die attach steps. As a die attach equipment supplier, that's really good news for us. Next. It's not just hybrid bonding enabling these applications, it's also other kinds of interconnect. One of them is called embedded bridge attach. This is kind of a new technology that takes the place of silicon interposers, which used to be used for very commonly for 2.5D integration. Basically, it's just the concept of taking a small slice of silicon, embedding it in an organic interposer, and using that for this really high-density chip-to-chip interconnect. We provide equipment that performs a very precise placement of these bridge chips into those interposers. There are a couple of new products that have been introduced using this technology. The first is an AMD device where they've taken, again, a GPU, and for the first time in their history, split it up into two devices. They're connected via these bridge die, those two devices, as well as the HBM die that are sitting alongside it. Apple also introduced their M1 Ultra chip using the same technology, essentially. Effectively, what they did is took two M1 Max chips, which are identical, and connected them using this technology in the package, and were able to have a drastic increase in performance. Next. In the future, we see silicon photonics coming online in high-performance packaging. We're already a big player in silicon photonics for optical transceivers that are used today. We perform things like attachment of lasers, photodiodes, and other subassemblies into those modules. The next step is really co-packaged optics. You can think of this like an optical chiplet that is added to the complex chiplet system, mounted onto the substrate next to the other components. We're also seeing a lot of activity in wearables and sensors, other opportunities for us in the photonics community. Next. Mobile, we see the 5G rollout still in progress. I'd say it's in mid-cycle at the moment. If you look at the adoption rates, you can see in Europe, for example, only 4% of devices connected are using a 5G connection today. That is still progressing. We see mobile traffic growth, growing rapidly, accelerating actually, as more of this data is being transferred back to the data center. Next. In mobile, if you look out 2-3 years in the future, what do we see? The first thing in terms of communication infrastructure is the adoption of millimeter wave. Today, most of the 5G deployments are still sub-6 GHz. So I'd see more small cells, repeaters being deployed. That'll drive innovation in the RF front end and other portions of the RF radio. I think one of the most exciting opportunities for us is the potential for hybrid bonding to be adopted in the mobile application processor. If you look at the application processor today, it's usually the biggest component within a cell phone. That chip is already pretty big. It's facing the same headwinds that working chips are facing in terms of Moore's Law slowing. At a certain moment, it'll have to go to 3D, we think. Hybrid bonding could be used in the base package of these application processors in order to provide that generational boost in performance. Beyond that, we see things like AR glasses and other peripheral devices that people are thinking could potentially either work with or replace the cell phone. Next. In automotive, really the two big trends are electrification and autonomous driving. Those are the two areas that are really driving growth in the semiconductor content of cars. Next. Some of the areas that we're working on with respect to electrification, we talked about earlier, the silicon carbide and gallium nitride device types that are displacing silicon IGBTs and MOSFETs. These require new die attachment methods like sinter bonding, for example, which we are supporting with our EVO platform, as well as new molding and singulation technologies supported by our packaging business unit, and even plating technologies for vertical power GaN devices to support our plating revenue. Next. Finally, autonomous driving. We see driving a lot of demand for different types of products, cameras, different kinds of sensors, LiDAR. Already, radar is heavily used in cars, growing. It's also driving more just computing power. So we see, for example, the Tesla computer has two high-performance flip chip devices on a main board for their autonomous driving computer. Automation will also drive significant growth in both legacy leadframe and advanced flip chip. Next. Just in summary, we think we're very well positioned to take advantage of these trends. We see multiple drivers in each of our key end markets. Key thing that we really see is the slowing of Moore's Law is really driving this chiplet architecture, which really requires more high-density interconnect, more advanced flip chip, hybrid bonding and TCB. We have new mobile technologies on the horizon as well, and a strong trend towards automation and electrification in the automotive market, driving our business as well. With that, I'll turn it over to my colleagues. Thanks, Chris. Let's make that work. It should work. All right. Good afternoon, everybody, and warm welcome here to the audience in Austria and also to the online attendees. Let me briefly introduce myself. I am Christoph Scheiring, Senior Vice President for Die Attach. I am with Besi already for more than 20 years. I have had several management positions within R&D and PM over the years. Since 2019, I am heading the Die Attach Group, which is the biggest revenue contributor for Besi. That brings me to that slide. I am at this moment responsible, as Richard explained, the recent move we did. I am at this moment responsible for the following product lineup. The first one and the most relevant one in terms of revenue, as it contributes around 50%, or did contribute in the last cycle, about 50% of the revenue. This is the Multi Module Attach machine, the 2200 evo, followed by the single chip epoxy bonder. Our 2100 platform, also quite high volumes being delivered of this machine and very relevant from a revenue perspective. Next one, flip chip, with the 2100 flip chip platform and the 800 flip chip, and also the soft solder platforms, the 2009, which is the workhorse in the industry, and the new one, the 2100. All in all, we are talking about a revenue of about EUR 600 million in the last cycle that those products were giving us. The ones that you see on the screen here with the green boxes behind are recently launched machines that are new in the market, launched in the last couple of months, as you see here. Together with some more developments in our pipeline, will definitely help us to grow the business further beyond normal market growth and will drive us to the next level in the next upcycle. Richard, in his presentation, was giving you this indication of the EUR 1 billion ambition we are having. With the products you are seeing here, we are aiming to get to an EUR 800 million level in the next upcycle. Let's go in the next slides, product line by product line, a little bit into the detail to give you some context and specifically to explain where we do see the potential for further growth. Let me start with the EVO platform. As you can see here from the number of installed equipment, it is a real workhorse in the industry for multi-chip, multi-wafer applications. Key competitive advantage here is really that this machine is highly flexible, feature-rich, highly configurable, and can be adopted to the specific needs of various different markets. If you look to the middle, the chart in the middle section of that slide, you see a classification of the markets. The most relevant one is certainly here in mobile communication, the camera market. This is the machine we are serving in mobile camera modules, and with a huge install base there. Also, very relevant here in SiP is the SSD business. Also substantial installations. Automotive is important, since Chris was talking about the sinter market. Last, but certainly not least, especially in terms of future development is photonics markets, silicon photonics, where also this flexible, versatile platform is playing an important role and will play an ever more important role in the future as we are developing further. That brings me to the right-hand side of the slide that shows the major development directions we are having in mind and we are working on right now. First one, it's all about accuracy, improving, increasing the accuracy. We are currently at the three micron level, and we wanna go down to 1.5 micron level. That will help us to increase our share and the number of process steps we cannot adopt in the silicon photonics market, which is expected to be a huge driver. Somehow in combination with higher accuracies, we also see the need for higher cleanliness levels in the machine that will help us here in the silicon photonics space, but mainly also in the camera module market, where we do see. We have already a broad variety of processes that we are supporting, and we do see the chance to further grow the number of process steps we are serving. It's not about growing the number of camera modules even further. That will not likely happen. It is that we are taking more of these assembly steps, and there is a good chance to do so. Last one here is targeting the growth in the automotive market by increasing force capability on our machine, and that's basically an enabler for sinter interconnects. Let me go to the next platform. The high-speed epoxy bonder. The key element here is really this is the highest speed, highest accuracy single chip epoxy bonder in the market. Also, here we are talking about a huge install base. At this moment, already 4,000 units or more than 4,000 units are installed. Key competitive advantage besides accuracy and speed is certainly here in this bondline thickness. The more you go to the higher, the more relevant it is that those dies are being bonded with a very consistent bondline, and that's the key advantage of this platform. There are competitors out there delivering similar machines, but here is where we are differentiating. Besides that, other features are relevant on that front. Ultra-thin dies is key. Cleanliness levels is key. Automation is key. You see once in a while, this I here. This I stands for intelligent machine. So we wanna make that machine as independent from the operator as possible and put a lot of intelligence into the machine using artificial intelligence meta-methods for teaching of products, for the vision, for all kinds of stuff. If we look to the markets, yeah, we are certainly driven by the mobile markets. 5G infrastructure is driving a lot. We are in automotive. We have install base and potential in the storage, in the NAND flash placement, as well as in industrial applications. Talking about where can we further grow? Clearly, in the high-end portion of the epoxy market by introducing even more complex volume control, epoxy volume control functionality, adding inspection functionality in order to do a six-side inspection. In one stop, we inspect six sides of the die, inspecting for cracks, for delamination, et cetera. As I said already, on the automation function. Talking about the flip chip product portfolio. Our flip chip machines define the standard for the market for flip chip. Every flip chip OSAT and flip chip OEM at this moment is basically using these machines. Either if it is in the leadframe business, which is on the lower-end side from the accuracy point of view, using the 2100 flip chip platform. If it goes more to the higher end side, we're talking about 8800 platform. In between the 8800, we have two variants. One is the high-speed variant, which can go up to 14,000. That's the one we have seen downstairs. We have a version which is more than for the flip chip BGA market. The fan-out wafer level packaging or 2.5D markets. This is the so-called 8800 Chameo platform, which is higher accuracy, a little bit with the trade-off in speed. Lower speeds, as you can see. On top of that, lots of additional loading elements, loading features, factory automation convenience. That's the product line up. As I said already, virtually all flip chip manufacturers are using that as their process of reference. Where do we have the potential to grow? Very clear. On the one hand side, it's all about accuracy. Those high-end processes, talking about different layers of bonding in these assemblies. These packages drive the need also on this side for higher accuracies. We are responding to that with a bunch of additional developments we are doing. We're going into granite. We have this B-axis. We are adding tape reel feeder applications, et cetera. The other direction is speed. You have seen already at least the group I was heading through the demo center. We are working on these cradle concepts to make the machine faster, and we have more developments in our pipeline to work on more speed and more productivity of these platforms. The last one, soft solder machine. With our 2009 platform, we have the true process of reference for key items in the high-end automotive business, as well as in the high-end side of industrial applications. What we did over the last two years already, and we are now basically at the end of the third stage development, is we transitioned this process of reference from the old 2009 platform to the latest generation 2100 platform. That gives us an edge in certainly accuracy and speed, but also usability. Beyond that, we were able to overcome limitations in the leadframe size. We can handle modern leadframes. They're going extremely wide and with this machine, we can also run those new types of leadframes. Next steps are targeting so-called diffusion soldering market, which is completely new invention for us as well going forward. This is a new type of soft solder application that is even allowing a higher performance interface. Some other aspects in process superiority we are working on and will help us grow. That's already the last slide that in a summary shows from the level where we are with our current product portfolio. There is a strong ambition to grow further. We do see opportunities for all of the product lines. Probably the biggest part is here for the MMA product line, because we are talking about further design-ins and further processes of reference in the mobile space, in camera modules. We are engaged with key customers in APAC at this moment that will help us in the years to come to get into HBM. Second, very big portion is here in the silicon photonics transceivers. The higher data needs in the communication space is driving this market. With our improved accuracies, we will be getting more grip on that market. In the flip chip space, it's the memory market is converting more and more to flip chip, so these higher volumes will require higher speed machines. With our Quattro or CQ HS, we are having a good solution there. We are working on higher accuracy, one micron and below accuracy on the CHAMEO platform to tackle the challenges in the fan-outs in the electronic performance world. For epoxy, we are further improving the capability for the high-end, for MEMS, for RF devices. For soft solder is now really the launching phase of the 2100 soft solder platform. We have qualified the first customer, more to come. That also will be a growth engine for us going forward. That's what I have to share with you for Engine One. Peter, talk about Engine Two. I'm talking about Engine Two. A warm welcome from my side. My name is Peter Wiedner. I'm an electronics engineer by education and holding a master's degree in process automation. I have been working in the semiconductor industry and for Besi close to 20 years. Actually, I have to say in recent years, I tested also some other industries like automotive and jewelry industry. As Richard said, I was joined back to Besi and with that to the semiconductor industry as of April first. Why did I come back? Because I got the great opportunity to lead this Engine Two business that Richard has introduced in the very beginning of this introduction here. We also got a name for that. It's called the submicron die attach business. At the same time, I'm also your host here for all you who are present in Austria, because I'm the site manager of this site. Welcome. Now, as I said, submicron business or Engine Two, like Richard said in the beginning, what is that about? Let's start with that. You have seen this slide in the presentation of Chris, showing a schematic of this new chiplet design package types. He also told you, and it's written here, that there is a lot of processes needed in order to assemble such a chiplet package type. Actually, if you look at the first four, these first four are steps which need extremely high precision, so 1 micron or better. That's also where the name is coming for, the sub-micron die attach, because in order to make machines and have offerings for the market for these process steps, that is my job here. How are we gonna doing that? We are doing that, we are covering that area with three different machine types. From left to right. On one hand, with a thermal compression machine, which is still needed within these chiplets. Secondly, and also Christoph has talked to that already a little bit, oh, sorry, not him. Chris has talked to that in his technology presentation. There is this connection thing, this bridge attach. Last but not least, the most important one, the new connection technology, the hybrid bonding. With these three offerings, we can serve the majority of the real high-end connecting technologies within such a chiplet architecture. Now, let's go through these three machines and sections, and let's start with the thermal compression. Now, thermal compression as a process is not new. That's around already for years. Still, why is it important, or why is it different here? Because if you want to incorporate a chip with thermal compression into a chiplet, like on the hybrid bonding, it has to have much more connections, much tighter connection, a smaller bump pitch. For that reason, if you provide a machine for that, you need much higher accuracy than in the past. That's the reason why we are getting to an accuracy requirement below 1 micron. Now, along with that, it's not only the accuracy. Also these chiplets are getting bigger compared to typical applications for thermal compression in the past. For that reason, you need also much bigger sizes, die sizes. You see that here on the slide, 70 by 70. Last but not least, because everything is getting smaller in the bump pitches, also the typical process that has been used in the past for thermal compression, using flux as an agent, is not really suitable anymore. You need to go to a fluxless process. To incorporate all that into a machine, we decided to really start and build a new machine from the ground up. We have an existing one, by the way, former offering, but in order really to serve this market best, we decided to go for a complete redesign, and the ones who have been here already could have a look at it down in our R&D lab. This machine actually will be launched at the end of this year to the market, and we are developing that already together with the lead customer. As an add-on, we also are taking care about the inert chamber. That's because that's quite expensive, all the N2 gas that you are needing, and we have designed, made a complete redesign with a much better inert chamber, which gives much more benefit to the costs that our customers has in the end. That's thermal compression being introduced end of the year. Let's go to the bridge attach as the next point. When you have these chiplet designs where your different dies are sitting next to each other, you have to make the connection between. There are a lot of different technologies, so let me be clear on that, on how to do that. One opportunity is to use a bridge die of silicon where you have the connection, and so put it underneath and make the connection with the silicon die. You see the scheme on how that's working in the lower middle of my picture here. That's also in the scheme of this chart you see there. Now, especially in the high power computing, this solution is very well established, and we have seen specific examples in the technology section shown by Chris. Also this die you have to place. What's different, perhaps, to another wafer level fan-out application, because that's what it is in the end, it needs to be much more accurate in placement, because if the bridge die is not placed accurately, you will not, you know, fit with the other dies, in connectivity. What we did here is we used, actually our flip chip platform that you just have seen, on Christoph's presentation, which is a great basis for these wafer level applications, and we brought it to the accuracy level needed and to the 1 micron here in that case. With that, we have shipped the first machine in already in April, and we are just preparing the next machine to the lead customers. What is also important to know and to understand here is, you know, this is the methodology on how you can apply the bridge die. That's not, let's say, straightforward right now. Of course, you can apply it die first, die last. Not to explain what this is, but different methodologies to build it in. What is very important at this point in time, at the starting of this new generation, is to have a very flexible platform that you can follow different methodologies that customers want to apply and how to adapt them. That's really great with using our existing flip chip machine, which has a lot of capabilities and options already built in. Really adding the accuracy was the key point to get a perfect machine for this bridge die. Next one, and most important one is the hybrid. We all know in the meantime, because all of these conferences, you know, that hybrid is a great technology, and I don't repeat what Chris told you about the basics of it. The bottom line, if you look at the machine, is that you need to have a great combination of the accuracy, because that's a must, otherwise it doesn't work. To do it with a great speed, because otherwise the cost of ownership is not attractive to the customers, and then also the whole chiplet ecosystem is not attractive to that. That means the real key point here is to deliver a great speed, and that's what we are doing right now with 2000 UPH at our customer site, and that in combination with 200 nanometer accuracy. That's really the great achievement here. Compared to perhaps last year's investor presentation, where I could not join, obviously, as I just rejoined Besi, it is what really happened is that the volume production started this year 2021. We did ship the machines, we set them up into operation, and the Ryzen processor that Chris had in his presentation is built on these machines as is. Now, the next step, where we are working on right now, is to integrate this machine into the typical used cluster lines in the front end, because that's the next step which is needed. That's the next efficiency step. Of course, the cluster lines give a great benefit in front-end environments. Then after that, and we are working on that as well already, we are in contact with the lead customers who are telling us what the needs they have for their next package types. They are thinking on even smaller bump features, which is then requiring even a higher accuracy for the machine. That's the reason why you see we are working already on the next generation of that, getting to 100 nanometer accuracy at the end of this year. Target-wise, I come to that on a separate slide, but just in a nutshell here, it's really starting here with the computing, the chiplets. We see that with the AMD, but that's definitely not the only application. Clearly the memory, and also what we have seen, the mobile market, is really bound to have hybrid bonding. Now for the ones who are not able to join us personally here in Austria, I have a quick video where you just see the cycle inside the machine. You have seen it already on our tour. Let's just start that. It's pitching the die here. It's making some adjustment. Especially here now in that stage, the real high accuracy adjustment is done. The fact that you get to the nanometer accuracy. That's a typical cycle, but you only see one bond head here. The machine has two bond heads, so it's double the speed. Just to get a very quick impression on how we are doing that and how the machine looks like and works. Now, as I said, let's go to the markets. Clearly, we're placing the logic die in the chiplet. That's what we are doing right now. That was the starting point. Really this year was the volume production starting point. That's really the front runner using hybrid technology. The next application that we see coming up is the memory. Of course, you have seen it also in Chris's presentation. There is always the memory inside the processor as well. If you have more computing power, you also need more memory with a high-speed connection. The nice thing, when you use hybrid bonding on such a typical, memory build up that you see here in the picture, is that you can stack more memory dies on top of each other at the same size factor. It won't increase the height or the total size of the memory. It still fits into the same package die, and you can get more memory into the same space. That's the great advantage. Also once again, it needs to go with the more powerful logic, and the high-speed connection. Otherwise, it's not a smooth process. That's the reason why also the memory dies, the big IDMs are really working on this technology for their memory as well. Third, what we are seeing is the mobile. Once again, already shown that the application processor is getting to its limits. Chris said that, I won't repeat that. What he also said in his presentation is that also the RF module, you know, going for the higher frequencies also are in need, you know, to have this better connectivity. The real nice thing, if I look at it for my, for our business opportunity, is that if we go here in the mobile, it's a minimum of two devices that are heading towards the hybrid and not only the application processor. That's another multiplication factor for the business. Perhaps farthest out, but still already in, let's say, early discussions with end customers, we see that there is also some interest in sensors and displays. When I'm saying displays, I'm not talking about our laptop and computer displays, but really more about Google Glass and these things. We're already in contact, and we're getting a lot of interest on what the hybrid technology could do to boost these type of devices in order to get more computing power in there, which they need in order to make more advanced products. That might be, once again, far out, another area where hybrids could be a game changer. If we sum everything up now, we are getting really to a increased picture of what we think the hybrid market will be. You see the lines. Actually, what I called here the blue one mid case, that was, for all of you who have joined last year, was the high case line of last year. With what is going on with hybrid on the radar of really every relevant semiconductor producer, for us, it's really not a question at all if hybrid is coming, and you can buy it already, so it's there. For us, it's only a question when and how fast and how much will it come. Yeah, we put our intelligence together, and we see compared to last year, with all these adoption gaining traction, we see really a better opportunity. We think that until 2030, not 2023, 2030, that can be a business up to EUR 3 billion. Once again, here the expected rollout sequence, but I told you that already. Also, subcontractors coming on later. With that, I'm already at my summing up slide. Once again, the logic customers have moved. The first ones have moved to volume production, and the others, the competitors of them are on their neck, so we are engaged with multiple customer. At the same time also, we have matured everything, so our machine that we have built is out of the proof of concept. We are doing quantity shipments. We already had the first shipment to a memory customer this quarter, so that's then step number two for the memory guys. We also see, and I'm sure you are attending some of these conferences as well, you know, a lot of hybrid papers all over the electronics conferences. With that, also the interest in all the research companies of our industry is increasing. We have also set up our own Center of Excellence in Singapore, where we are using for more customer engagement. We also have signed a joint development agreement with imec, and we have put a machine there to make research together on this hybrid. The R&D efforts of the industry are picking up greatly, which is always a good sign. Finally, also internally, we really did our homework. We have expanded our production capacity in Malaysia. We have a clean room there. We can build up to 15 machines a month. We have shortened the production lead time, you know, from an initial prototype, which always takes longer to a volume production of three months. Currently, we are at three months of the lead time, which is much more fitting to a volume delivery. Also for sure, we have beefed up our service and support staff all around the world, from Taiwan to the U.S. Once again, one thing which we consider very important at this point in time of what we are currently doing, I mentioned it already, we are preparing the combination of our tool with the cluster tool together with AMAT at the same time in Singapore and in the U.S. at this time. To really give our customers the next level of machine equipment that they can use then next year for their volume productions. Thank you. With that, we need to hand over to Jeroen. Yeah. Thank you very much. Yes, you can hear me? We can hear you. Okay, good. Thank you very much, Peter. Yeah, first of all, as well, a warm welcome from my side. Currently, I'm in Singapore in our Center of Excellence, discussing with some customers some new opportunities. Therefore, I am not able to join you in that site in Radfeld. My normal residence is in Duiven, in the Netherlands. My background is a master's degree in construction engineering with specialization in thermodynamics and robotics. I've started Besi in 1998, so almost 25 years in service. Throughout the years, I had several R&D positions, product management positions, and I took over the full PNL responsibility for Besi Netherlands for Besi packaging in 2012. Today I am responsible for the main... Until now, I'm still responsible for the mainstream packaging product line. That includes molding, trim and form, and singulation. Next slide. As Chris already mentioned, the semiconductor market consists of four segments, which is the 5G and wearables, the IoT and computing, automotive, and storage and networking. For all these four market segments, we have various equipment located in this market or addressing this market. Looking at the 5G and the IoT, there we have three main machines in there, which is the AMS-LM. That is a molding machine that is doing substrates two-sided molding. It's highly specialized in exposed die and wearables for SiP packages. This machine is the highest revenue for packaging and the number one in this market segment. Looking at singulation, the FML that was developed a couple of years ago. Now finally with some new developments with step cut and high-speed sorting, we are gaining market traction from our customers. We also have wafer panel molding. As Chris already mentioned, for the chiplets, there's also molding involved. With this machine, we are able to do the chiplet exposed die. On the other market segments, the automotive and storage, we have another molding machine, which is a new machine, the AMS-X, that is introduced in 2018, and that is focused on high-density leadframe high-power packages. After the molding, we need to do trim and form. Trim and form, FCL-X, that one is the high runner for packaging in that market. It is the number one machine, and we are mostly focusing on this machine for further optimization and to gain more market share. Last but not least, is plating. After trim and form, we need to plate the lead frames or the power packages. With plating, we have a machine already several years in the market where we are developing new kind of applications as well. As Richard mentioned in the beginning, there is the solar panels on the rooftop from Radfeld. They are produced with this kind of plating machine. Okay. Next slide. I go a little bit in the details of each machine. As mentioned, the molding machine, the AMS-LM, is the highest runner of packaging. This machine is capable of doing complex 3D shapes as well for the 5G market. As an explanation, you see here on the picture this 5 millimeter wave component where you have an exposed area and a molded area, and the next generation, there we see the 5 bumps on top of that. Those are the 5 antennas, so the future antenna-in-package applications. At the bottom side, you see also there the component placement that can be done on a later side. From both sides are molded in from our machine. This is a SiP package, so a lot of components are placed on a very short distance from each other. That can create a certain ESD issue, so we have developed a new functionality in the machine where we can reduce the ESD to the lowest level of below 50 volts per inch. As well, in this SiP package, it is also for wearables. In wearables, there are a lot of MEMS sensors, and these MEMS sensors are measuring blood pressure, heartbeats, fluids, all those kind of things. These sensors, these MEMS sensors, these dies are very sensitive. We cannot handle the standard packing pressure that has been used in the molding machines. For that, we are developing a lower transfer pressure so that we can save the die and still encapsulate the whole die without any voids or air interruption. Now, with these SiP packages and they're getting so close to each other, there's also this compound that goes around it that is these days almost like water. All those compounds can get into the smallest corners of the mold tooling, and that needs to be removed. We have developed a new design of particle removal for the mold tooling. Next slide. As mentioned, the FML, the wafer level molding, that one is focused on the overmolding wafers. You see there a small picture. In this case, it's a wafer level mold with an exposed die. As shown in the presentation from Chris, you see on the chiplet also the top side was exposed. Currently, the market this is still overmolded and it is done by back grinding coming back to the exposed die. With this machine, we are already able to do that completely exposed. That is also heard in the market, so we are engaged with several front-end OSATs, as we can say. On top of that, we are developing to further improve reliability, an auto-leveling system. With that one, we are able to get over a 300 mm distance, a planarity of ±5 micron. That is needed in order for the exposed die not to have any compound over the exposed die, because later on, there could be some replacements. Next to that, there we see the TSV molding, the hybrid bonding dies, where these days we see first a glass carrier with some tape in there, then the bridge wafer, then the dies are placed on top of that. We mold the whole package, and later on, this glass carrier will be removed from the package. Next one. For singulation, as said, we have this machine already quite a while in our portfolio. We have invested in the last two-three years quite heavily in this machine to develop new applications and new features. One of the biggest contribution is the step cut functionality, which you see in the middle section. Step cut functionality is that you first make a small cut in a QFN lead frame, then you go for plating. You cover then the exposed area with tin or nickel palladium. At the end, then you make a final cut, and then only a small area is then exposed with copper. That can be then soldered to an SMT board. By reducing the level of copper, the reliability of the package goes up because there's almost no chance for oxidation of the copper anymore or of sparking with these high power products. The first machine, we shipped that one in 2021 to the customer. That is now fully accepted, and in the last six months, we got traction from several automotive customers to deliver these step cut functionality. On top of the step cut functionality is for the mobile market, where we're talking about the RF devices. Also there, you need some plating over these RF devices. So also there you make first a cut through the molding compound, and then you go for the plating, and then you make the final cut. Also in here, this can help the step cut. This year we're also developing the high-speed sorting. Then we can reach a UPH of 45K, and there we will outperform the current market. With the high-speed sort and the step cut functionality, there is also included six-side inspection to do a full inspection of the sort products, to increase reliability and to sort out no good die. Okay. Next slide. The latest machine that we have introduced in the market, that is the AMS-X. This one is machine especially designed and engineered for the automotive power packages. We have introduced that machine in 2021, sorry. Currently we are engaged with multiple customers for various configuration of these machines. With this, the high power packages, it is very important that the compound density around the chips must be in order, because if there is some air entrapment or some void, then there could be a short circuit. On this machine, we have developed a vacuum control mechanism where we can achieve less than 50 millibar of air pressure inside of the sleeve or inside of the cavity. Alongside with these high power packages, the compound needs to have a very good adhesion with the lead frame or with the carrier. If the adhesion is not optimal, then there could be water or moisture going between the package and the lead frame, and that can cause further delamination. This adhesion or this delamination is mostly caused right after molding, when the molding curing is finished. By having independent injector bed, we can release the products more smoothly and therefore preventing delamination of these power packages. Now, on top of that as well, because it's a new machine, we also have to be committed to the environment. We have engineered that this machine will have 20% less power consumption as the standard these days in the market. Also we have a reduction in compound, so about 12%. All these items have been taken into account in order to support the ESG targets that we have set out for ourself within Besi. Next one, please. Also for the automotive market, that's a Trim and Form machine. Trim and Form machines, we have more than 1,500 systems shipped already. This Trim and Form machine is the high runner or the high revenue system for this market for packaging. It is capable of handling multiple or various different configurations. The trend that we see at the moment within the automotive is that you need zero defects, factory automation and full traceability. For this, we have developed the leadframe flipping. With that one, we can do laser marking on the top and on the bottom, and at the same time, we can do a full inspection of the devices, and we can sort out the no good dies. Next to that, we see on the existing lead frame packages, there is normally the leads is connected to the lead frame and also a tie bar is connected there. This tie bar is to prevent packages of chips, mobile chips falling out of the lead frame. Because first we will cut the leads, then we will shape the leads, and then at the latest moment, we will cut out the tie bar. Now, this tie bar is a metal connection that is connected to the lead frame. If there is a high power going through this power package, there could be a short circuit going through this tie bar. The next generation, what we see is that there is no more tie bar. That give us a little bit of headaches or problems, because when we cut the products, then they are removed from the lead frame. We come up with a new solution to still hold the product inside the lead frame, that we still can cut, we can shape, and then we take it out of the frame without having a tie bar. Also, the power packages are on evolution. They are. Ten years ago, they were very big. You can see it on the top side. These days, these packages also becoming smaller and smaller and thinner and thinner. By shaping the leads of these packages, we see that the compound is not thick enough anymore. It can cause some stress on that compound and creates a micro crack or a chip off, as you call it. In order to prevent this, we have developed a new mechanism where we can do with a low stress cutting, so we're not pulling too much on the lead anymore, so it will prevent micro crack. Next one. After the trim and form, we need to do the plating, so to cover all the leads with tin or nickel palladium. Making a plating is quite well-known, established in the market. We have more than 820 systems shipped in the market. What we are doing in this machine is further enhancement and improvement. The latest development is the wafer blank for QFN. I just explained you about the step cut, where we do the half cut. In this case, we do then with singulation make a full cut, then we place this on a sort of carrier, and this whole carrier goes into the plating line, and then we are plating the sides of the QFN, but also the die pad. For the power packages, to get the heat out, there is a clip attached. That's what Christoph already mentioned. This clip attached is done with the flux, and there will be some residue. This flux residue needs to be removed. That is what we can do with the plating line as well. The next part is when we do the molding, there is a heat sink. This heat sink is also to get the heat out of the package. There will always be a little bit of residue on that heat sink, and with the chemical deflashing, we can remove that compound. We have then a clean heat sink, and the customer has a maximum area where he can extract the heat out of the package. Next slide. Yep. Summarizing the growth opportunities for packaging and plating. Here we have the lineup of all the six machines again. For the substrate, the AMS-LM, there is the market, the future market is the SiP packages that started, I think, four years ago, and now it's going into a high run. We see all kind of small devices like the wearables, which you have on the wrist. As Peter mentioned, the Google Glass, the AirPods, all those kind of small wearable devices requiring SiP packages, and this is the machine that it's fulfilling that need in the market. Now, on the wafer molding, as also Peter mentioned, the chiplets or the hybrid bond, hybrid bonding. With the wafer molding, we also can overmold and also do exposed on a complete wafer. For the AMS-X, the high power packages for the drivers are the autonomous driving and also electric motors. We see the motor drive train. The adoption of electric cars is widely accepted. We see growth opportunities in these auto electric cars. For the Fico Compact Line, now the same as for the lead frame molding, only there we are focusing on zero defects and factory automation, and as well Industry 4.0, we have some growth opportunities. For singulation, the RF devices and the QFN power package with the step cut and the high-speed sorting for standard BGA and LGA packages. Last but not least, the plating line for focusing on the industrial and the automotive market. Here, same as trim and form and molding on the autonomous driving and electric motors. That is packaging and plating. We are now at the end of the presentation, so I hand this over to you, Richard or Leon? No, Richard. Thanks, Jeroen. Okay. Christoph, Peter, if you step forward. Christoph. Are there any questions? Sorry, is there any questions in the online audience? Please raise your hand so we can put you in the queue. I see already some questions here, so let's start at the front. Front here. Hi, Francois-Xavier Bouvignies from UBS. I have two question, hybrid bonding specifically. One is, can you talk about the average selling price that you are seeing today and how it is evolving with the roadmap that you have? How do you think, you know, the pricing of this tool should evolve going forward, based on the evolution of the performance? Second of all, you mentioned memory and mobile, of course, as the next adopters after computing. When do you think you will have the commitment from your customers to for you to see, you know, the ramp? For the pricing, for a link, it's between EUR 1 million and EUR 2 million. We are seeing the price, rather increasing than decreasing because, the accuracy, as I have shown you on my slide, is going up. 100 nanometer, we are already having discussions about 50 nanometer and, you know, the higher accuracy will also drive the price in the end. That's for your first question. For the other question, we do have, these contacts, you know, with these RF and application processors providers at this point in time. They are definitely not as far as APAC as an example, but I can definitely foresee that depending on the speed they want to move between, let's say, 3 years, 4 years. I see them definitely in the arena of hybrid. Yeah. Matthew, please go. Yeah. Thanks. Got a question on the segmentation of the market between die-to-wafer hybrid bonding and wafer-to-wafer hybrid bonding. I think there's a slide of imec going around where especially in the memory area, both DRAM and NAND are in the wafer-to-wafer camp. Seem to have a different opinion. Can you elaborate on how that is different? Chris? I think that's best to you. Yeah. How would you guys? Yeah. Definitely in the NAND market, we see some wafer-to-wafer bondings. There's a company in China already in production. Yeah. Doing the wafer bonding. DRAM, we actually see customers interested in die-to-wafer. It's higher value components, and the yield is a more important factor in this making. Maybe on a follow-up. In terms of ultimate accuracy, is there a difference between die-to-wafer and wafer-to-wafer? Again, I think sort of heard that maybe the wafer-to-wafer side has potentially longer-term higher accuracy, but I guess it's a sort of yield versus, Yeah. I guess yield is better for die-to-wafer. Is that the right thing to think about? Wafer, sorry. Well, there's two fundamental limitations for wafer-to-wafer. One is that you are limited to identical die size. There's many, many applications where you simply cannot do wafer-to-wafer. For memory kind of applications, inherently, they're less dense in terms of the pitch, generally speaking. The inherent accuracy of aligning a wafer to another wafer versus a die-to-wafer, don't think there's so much inherent difference there. I do think there are some fundamental limitations on what you can do with wafer-to-wafer bonding simply because of the die size limitation. Maybe then the last one, because then we covered all of them. In terms of cost, is there any difference? Again, I think even more towards 20, you know, second half of the decade where maybe both technologies are more mature. Would that have? Yeah. Any color would be appreciated. The advantage from a cost perspective that you have with die-to-wafer bonding is simply that you can pretest your die on a source wafer and only place good die on the target wafer. Even for these same size die size applications, if the value of the die is high, they're not fully inexpensive chips, then I think that the die-to-wafer flow will still be always more cost-effective. Sure. Thanks. Okay. Once again, if there are any questions from the online participants, please raise your hand in the Webex, so we can entertain that. Otherwise, we move on in the group here. Let me just go this way. Yes. Martin Marandon-Carlhian from Oddo BHF. Just also a question on the ramp-up. As you said, most of the volume should come from smartphone and mobile applications since it's starting to serve devices and not just the processor. If everybody is ready, the success we expect with an acceleration. Sorry. Let me correct. I did not say that the most of the volume is coming from mobile. I said that's just, you know, the third in a row. Yeah. It's giving another upside potential. What you have seen actually in the presentation of Chris is that, you know, with the high power computing, which perhaps has not that high volume, you know, if you count the high power computing devices compared to mobile devices. As you see in this, you have 30 die attach steps, you have to multiply that by 30, so it's very capital intensive, actually. Really this section that has started now is already giving us a greater, the big portion, you know, of our forecast. I just said that's the nice part also on the On the mobile is that it's not only one hybrid bond, so not only one device, but also there we see on one hand the application processor, on the other hand, the RF device. RF devices, because of the bandwidth, are sometimes more than one actually in a smartphone. It gives also a good opportunity in this segment. I just don't misread me, please. I did not say this is the real big stuff. Actually, we are starting with the high power computing already. Okay. Just a quick follow-up. The capacity for now that you are building, do you think that you would have to increase it further in the next few years if hybrid bonding is really a success for- You mean our production capacity? Yeah. We are talking about? Yes, I think so. Yeah. Okay. Mark? Yeah. Thanks. Mark is from ING. My question is actually on the slide that shows a couple of times, slide 29, where you say that with the system on a chip, you get you're using several different die attach techniques. That suggests if you move forward, and I think that you also showed that on the APAC example, number 4-9 steps to over 30 steps. But instead of sort of, yeah, sort of cannibalization, you see actually the opposite. You see a sort of flywheel effect that when you move further into the system, you're actually gonna see more and more growth on all these techniques. Is that correct? Yes. If that's correct, how can we make that link, that if in your scenarios, the hybrid bonding, how does it reflect in Engine One? First of all, I think you are perfectly right in saying that hybrid bonding and those chiplet type of applications are not cannibalizing in any form the Engine One business. It is just at the end, we will be seeing this package devices that are consisting of not only one single chip integrated monolithically, but being done with various chiplets attach steps. We will be seeing that later on at the end on one of our flip chip machines, for instance, doing a regular flip chip there. Taking your logic further or what you also suggested, we will see that portion of the business in addition, and we will just see similar volumes in the Engine One as we had in the past. Growing with the market up and down. If I may add to that this slide is the best illustration to your question. You need for the insight. This also tells you why it is an extension of Moore's Law. Think about that. In the end, the device has to be connected to an end application. For that purpose, you need both Engine One and Engine Four, and there's no cannibalization. It's maybe even the opposite, that if you're very successful with hybrid bonding, that you're actually going to sell even more of it. Yes, because you're moving inside the chiplet, the chip architecture. That's why everyone is excited that it is interconnecting into the wafer fab. It's a very simple calculation. If you take a classical SoC IC and a normal chip with a number of functions on it, and now you split this chip in three or four smaller ones, obviously, simply you need much more mounting equipment to mount them. Ideal case for me, I think, and we showed it in the past on one of the investor conferences. We said we have a bridge below it, and we have five bridges. We suddenly have 10 times the volume involved. All these things will take time to develop because it all sounds beautiful, but of course, you have to make the balance between if I separate the chip in different functions, I also have to connect them again. I have to get some real estate on the chip for the connections and so on. There's a fine balance. Our customers need the, or the end customers like AMD's and so on, they do all these calculations. For some products it will be earlier feasible, then later feasible. It generally, if you break up this chip, a long time it has gone, put more and more on the chip, and now we start to see because of the complexity and trend to splitting them up again. That is really, really in our favor. That needs both the most advanced steps and also a number of the, I would say, the more standard steps at the end of it, yeah. Here in front. Yeah. Yeah. Hi, I've got two questions, if that's okay. The first is, I think this is the second time today that you've updated your production capacity for hybrid bonding tools, and you're now saying it's gonna be about 18-20 tools a month. Which I guess annualized implies a run rate of about 240 tools a year. At what point do you expect to reach that 240 tools a year? And secondly, what exactly has driven those upgrades to the production capacity? Is it something like a new customer sign up or just an anticipation of an ever-increasing opportunity in hybrids? Let me give some flavor on that because Peter rejoined us, and we are very, very happy he rejoined. He started April, and some of the elements are still bringing in to us also. The issue is when we started with it, we estimated 1 or 2 products. No, we were already happy with that. Then we said, "Oh, we need this, a small clean room to build it." In that process, we saw, no, we need already more, so we built a substantial clean room. Richard said this earlier on. In our industry, it's always at the end of the day also a capacity questions. It will never come from, "Oh, I need one." It will come, "Oh, now I need 20 because I'm gonna ramp up this factory." We are preparing for that. We did the same in our Les Ulis factory where in 2018 we opened up an extension, and it was actually empty. Everyone said, "Ah, we could play football here." That was not the point. The point was to be ready for the wave because if you have to do it when it comes, it's either too late. We have to prepare, we have to look up front. We take some risk in it's clearly also, but we built a sizable clean room now. We are training the people. We train the supply chain for that because now suddenly a part that looks the same is a cleaned part, so it has to have a different part number. It has a different procedure. We built up that capacity, and I think Richard on the Intel assembly, there was this very nice thing, strategy is capacity. No, capacity is strategy. Capacity. Yeah, that points out a little bit. This moment where you say, when are you at 24, I understand the question, but let's say it's coming in 2-3 years we'll start to reach that type of level. We can move on to the next level. You always have to invest up front in this. Yeah. To add to that then, customers are qualifying us. Yeah on an ongoing basis. Yeah. Are you ready to supply in time when this adoption reaches those market segments which we are discussing? It's all customer demand driven. Your question, is there the next customer signing up? As Ruud said, over the past 12 months, we had a very, let's say, unexpected clarity on that. The adoption rate has increased significantly. That forces us to simply prepare for whenever this really happens. That may be 2023, but certainly 2024, 2025 are expected to be major adoption, mainstream applications in many end products. Not only high-end computing, but as already mentioned earlier, also on the communication devices. It simply will replace, let's say, still today on printed circuit boards, designing electronic circuitry that's being designed on chip level, multi chip, chiplet architecture, and that will be finding its way into the end markets in the next three years. Well, what I ASML basically has to be ready for that. What I felt was very different with this technology compared and I can say I have quite a long time in this industry is that now the designer is also the influencer because now they start because they have a lot of problems with say the N2 and the smaller nodes. They get an enormous capacity on the chips themselves but they have difficulty getting this calculation power connected to the memory sites the L1 L2 caches and things like that. They say with this technology we can actually rethink how we do that. That's a major difference compared to what we have seen in the past. The TCB is very nice and I can mount it instead of a plastic flip chip I can mount it a little bit closer but this is. Yeah, it's a real serious breakthrough in how you think about how you compose the chip itself. I said I was yesterday at this 3D conference, and imec had a nice presentation, not on bonding technology, but really on how you can now design the kind of next generation high power calculation device or a very efficient power device. What is also new, that was really Chris and I were in the States last few weeks visiting many people. One of the areas also, if you think about 5G, 6G, we are now in the rollout of 5G, which is very good for us, base stations, this many that, but 6G is already in the thinking. 6G will be early 2030, will start really come. There you have even more requirements on the RF part. I think a couple of years ago, we did an investor round where I showed this whole front end of a telephone with all the bands that you have to separate. That part, some of the big providers that came to us said, "We actually think that there's also a chance for this hybrid, is huge because of their complexity." That was a new one that I didn't see yet. That was also coming. Overall, the uptake is very, very professional. Sorry, just have one more. Just on, I think you mentioned in the presentation that you've started work on a second generation hybrid bonding tool at about 100 nanometer accuracy that I think you said will be kind of ready later this year. What kind of pricing uplift do you expect to see from that second generation tool relative to the first tool? Will it be the case that certain types of customers, such as logic customers, will stick with gen one and then newer memory customers will go with gen two? Or do you expect all of your customers eventually to migrate over to the gen two type tool? I guess to ask the question another way, by the end of 2023, what do you think will be the split between the number of Engine One tools you're shipping and the number of Engine Two tools you're shipping? Well, what hasn't been said yet, we've said it now already, is that this 150 below 200 nanometers today is what we think tied to 7-nanometer chip design node. The world is moving down to 5 nanometers, and even there's this capability to do 3, but that's very far away. In the 100 nanometers capability and placement accuracy should be tied to that 5. What Peter mentioned, 60, and this is very serious. Customers have told us who are at very advanced nodes that we should be able to meet 50. If we meet 50 with the total scope, you can cover the entire design geometry, let's say roadmaps, which are currently under consideration. Some of it, and that's again why this slide is very important to understand. Some of it is tied to that very high-end interconnects technology, whether that is 100 nanometers or even down to 60 or 50. The rest is, of course, still with a further fan-out design. You have to have a full scope of those capabilities. That will all be, if you take this example, again, most ideally designed into one ultimate package, as opposed to having a printed circuit board with all kinds of electronic components. That's the way how you have to look at it. Percentage-wise, how much will be which is impossible to forecast, but that will tell you. On ASPs? ASPs are moving simply up. As Peter already said, complexity is directly linked to cost, and so you can imagine moving from below 200 nanometers to 50, 60. Take ASML steppers twenty years ago, they moved from $10 million to $50 million, and in our case, there will also be a significant ASP increase. What you haven't seen in the basement, we're already working on, let's say, the basic concept of reaching below 100 nanometer accuracy. What has also changed over time is backend for a long time was always something that came at back, at the last, "Oh, yeah, we need to pack it somehow." Of course, the guys are working hard, all of this. Now we are much earlier in the discussions and much further ahead. We're talking about what is needed in 2025, 2026 already because it's so connected now to the basic science of what they're doing. That's also really a very good experience. Certainly our cooperation with AMAT also helped. Then because that they have a much bigger portion of that market, they have higher access, so to speak. That certainly helped us also get more deeper into this, yeah, connections with the customers on that point. That really, yeah, helped. I think the current goal with our current machine, as you have here, we can simply reach in this 100 nanometer range. It will be in Gen3+. If you follow both Chris and, we've heard from Peter also, we've always had these different level of machines, so they can go quite some generations that you can improve. If you go in the 50 nanometer range, we definitely have a somewhat different platform also to do that. That is what Richard mentioned. We're working in the cellar on that, but that's for later, yeah. Jim, you had a question already. Thank you. Just following up on the updated cumulative hybrid bonding chart. Obviously, there's quite a gap between low and high case within your projections. That's quite a significant gap even in 2023. I was just wondering what the difference is, what the key variables are within, you know, the low to high case for 2023 for your hybrid bonding projections. Is that end market adoption? Yes. Is that customer adoption within HPC? Both. In the first place, adoption rates. I mean, we've had. As I said already, and Peter said, everyone, it's been a very positive adoption rate over the last 12 months with any conference you attend. One interesting, the ECTC, they compared one, and this compared to what was it? 2018, 0 on HBM. At this time, 48 presentations. In a similar way, we heard yesterday at the conference in Dresden. It's very. It's making its way because of all the reasons we try to explain. Having been around a few years, there's certainly going to be ways which routes will take longer because it's not just the placement of the die. There are also materials involved. There are, yeah, let's say copper to copper is very critical technology. How fast this adoption rate will emerge over time, it will face many hurdles. Some can be overcome in relative short time and some in longer time. We have to be a bit evasive on this. This is how many now project this market to develop. Try to do it in different ways. We looked at when something could be introduced, and then you have to translate this to when they have to have machines, and so on. I would say simply what discussions we have with specific customers, when they are talking about placement orders. We looked at different model formats, and then we did it as consciously as we could. We came with these numbers. We did this already two years ago. We already started with it. We're more or less tracking along those lines. We did our homework there. Well, we have the key customers, huh? Pick the winners in our simple strategy. At the same time, we have this relationship or partnership with AMAT, and we're all in this market, huh? This is the best what we can sort of conservatively. We also try to be a bit on the conservative side. You may find models which are far more aggressive. Again, we have to be ready. We simply at least have to be ready, and we've done major steps in many ways. So far it looks that we are able to be at the forefront. I think we will see at a certain moment the same success that we have seen with what Christoph has been presenting, where you move from 10 micrometers to 5 micrometers, 3 micrometers, and following, because if you're too far ahead, it's also not good. That model has worked well for us, and we think it will work for this also. Some people have to escape now. They have to catch one. Worry not. See you. Yeah. Michael Buch from Freescale Semiconductor. Removing all the functionality in the chip to individual chiplets and bonding them together, is that generally leading to larger die sizes? That's in various applications. Yeah. Yeah. It's twofold. On one side, if you want to compose all of this, then your modern die or bottom die actually is increased. One part gets expanded, but the chiplets themselves by nature are small. We also get a request for fairly small things that the people want to combine. There are other areas where you still see all the very big dies coming up. This is a combination. Sure. There are still interposers being used at this moment that also test us or the old package tests and so. Chris is also one of our guys. We see it on both directions. We see one direction going to much bigger. Esec for example, we get a request to do dies of 70 by 70 millimeters. It's a monster. Yeah. On the same side, for hybrid, we start to get requests for dies in the range of 2 by 2 millimeter, 1 by 1 millimeter. Now you have to think about another hybrid model. It goes in both directions. Yeah. Actually, individual chip will not get bigger, but the combination then, you know, sitting side by side, that is then going to get bigger. That you also once again need to attach them. It's. Yeah, it's both directions. Actually that's good for back end, but also good for front end. Yeah. Yeah. Absolutely. That's absolutely. That's also a benefit out of that whole, you know, new package type because they can be more effective. That's precisely why these big front-end companies are all of a sudden interested in advanced packaging. That's the answer. You see also, if you follow a little bit like Intel, for example, the more complex these chips become, the more difficult it is to get power locally to the transistor. You start to get construction where you have the front-end of the chip there and all the wiring, and now you have what you call the power supplies coming from the bottom side. There's also a whole new generation where also for the front-end guys, they have to rethink how they do that. There is a lot of opportunities, and I see the front-end guys and also other areas that are really investing like that. You look at AMD, how complex they are becoming. Remember that graph I showed initially from the applications we started. I think there's for all versions of applications, you have to find the correct one and to execute it at the end of the day. Yeah. Any last question, because we've come to the end. Achta. Hi, it's Aditya Metuku from Bank of America. I think today you added an extra plus into your EUR 1 billion plus plus target. Perhaps you could help us understand what that means. Your hybrid bonding productivity of 2000, just where you think your closest peer is in relation to that today. One second. Who is our closest competitor? No, just in terms of productivity, so unit per hour, where is your closest peer? 500 UPH. Versus your- Not at the levels of accuracy we have discussed. We had the great fortune that our system has been moved into production environments and operations about a year ago, and that has made it into a production machine. Most competitive platforms are still in development phase. They can accomplish a certain accuracy. Also a big difference, and you may have seen that. We have this dual gantry concept. One investor who weeks ago told me it's like the ASML TWINSCAN concept. It's true if you look at it. That sets us apart. You saw that with the dual gantry concept for flip chip, for memory that we reached with this four heads 14,000 UPH. In the end, it's all about units per hour, because that determines the cost. In the end. Although what we have seen at this moment from the competitor, I would say publications and market issue is, and we have seen this many times, is that we set the pace and then say, "Oh, we can also do this. We can also do that." Between a machine that does mechanically different this at a certain accuracy, once you start to work with live material, you see different numbers, because there may be a limitation how you reject things and so on. There's a lot of things around it, but we try to standardize on say, the speed definition, which is mechanical speed when you go die to die, and that speed will do that and that. That gives the rough number, but it may well, and you see there's a flip chip on every machine, it may be well different on a specific customer. Just don't give too much anchor on these numbers. From what we hear is that we are clearly ahead of everybody on this point. Well. Yeah. Again. One more here. Maybe the last one. Yeah. I noticed in your presentation, in 2030, SEMI expects $1.3 trillion semiconductor sales. Yeah. Well, last time I checked, it was only $1 trillion by some deals. 30%. That is very important. That was confirmed. We were at the Intel Supplier Summit, and they only forecast that it should surpass somewhere the $1 trillion mark. That is a growth rate from now to 2030, which is more than double what it has done in the past many years. These are all these drivers of the digital society, everything. On top of that, you have this enormous technology change. I've surely seen these numbers in this structure. It's 10 years. We're still 10 years ahead. I don't know, maybe the world is completely different then. We see the bigger companies like, say, the ASMLs, the KLA, all that. All these guys all have that type of projection. At that moment, I more or less say, "Well, let me try to make these estimates also," but it takes. It's in that range, and that's the measurement. Great. Thank you very much.