Welcome everyone to our Investor Day presentation on June 18, 2026. Following a tradition in the meantime, every year in June, we try to update you on what's happening, what are the opportunities, what is accelerating, what is maybe not that accelerating, but it's not many today. An update on the market and what is it not, to be very clear on that. We don't talk about Q2 numbers. You have to be a bit patient. In four weeks, we will have our Q2 numbers, and that's, of course, focused on the quarter and the outlook for the next quarter. The purpose of today is to give you a bit more longer-term perspective and how Besi is doing vis-à-vis the market, vis-à-vis the competition, some market share, and more importantly, on the fastest-growing segments in our business. We will spend time to try to convince you that those fast-growing parts of the market we serve are leading to a new model, which we announced this morning, up from 1.5 to 1.9, to 1.7 to 2.2. It's interesting that several of you, I won't call names, are a bit disappointed, as I read in the first comments. Well, that's probably in line with the world, which thinks that things will grow forever into whatever skies on Mars. Our models are based on a very careful assessment. We, as you know, some of you, test every three years our strategy in a very detailed fashion together with our key customers, also with the support of a major consultancy firm, to have everyone on board and to simply try to be as accurate as possible to what we can expect. Well, as a nice anecdote, last year, we reached a revenue level of EUR 590-something. If we would have been awarded a bonus for reaching that 2025 target, we would have received nothing, because if you look at our budgets, which we always make towards the end of the year, as every company, about 40% of that EUR 600 million was for completely other business than what we expected at the beginning of the year. It won't surprise you, the AI really started to take off by the mid of last year, Q3, and the other part of the market, the convention market, did not take off. That was an interesting development. Just to tell you, we know a lot, but we certainly don't know everything which is moving this market. A bit of conservatism is what we try to share with you. This is a long page with all kinds of disclaimers, which you may know very well. Nothing has changed to that page. For today, the agenda, I will give you a brief overview, Chris Scanlan, will explain the technology part, like Chris did last year. Peter Wiedner on the submicron market developments, both for Logic, also for HBM stacking. I'm sure you're all very keen to understand how that is progressing. Also the other applications using a hybrid bonding process. We have a short break, Christoph Scheiring, after the break, on the mainstream die attach. As you may all know, that is really booming. All the 2.5D engagements, photonics, those are the parts which are driving the bus today. Also, new modules in high-end smartphones. Our Engine 1, as we also call that part of the business, Christoph Scheiring will share the progress, the development roadmaps, what you can expect going forward. That is part, if you take the whole model, the now 1.7 to 2.2. About 1.1 is the Engine 1 part of that. The other part is, of course, the submicron part. Christoph Scheiring will share with you a lot of drivers, market size, very important. Photonics, we often get the question, how big is that going to be? I forgot to mention Peter Wiedner, of course, on the co-packaged optics. That's more on the submicron side of the equation. Anyway, and then we have a summary and an open discussion, and you're most welcome to challenge us in every way because that's what life is all about. Let's go to the strategic overview. Well, it won't be a surprise, the first sentence, overall market conditions have improved significantly. 50%+ compared to a year ago, which is simply a fact driving the whole AI infrastructure, and that's where Besi has a large part. The second message is equally important. How are we doing in that market? Are we gaining share? Are we losing share? We'll share with you that we are definitely on the right track. We have the right products, we have the right customers, and that has improved significantly in the last 12 months. If you look at our profile, look at the order growth, that also explains more or less what we've said in the first two sentences, but then also our margins. Many of you are used to Besi margins, gross margins, somewhere in the mid-60s%. In the down period, it was a bit trending towards 62%, 63%. Net margins, 21% at the bottom. Probably if you look at the guidance for Q2, it should move well again above the 30%, if you take the gross margin and the OpEx guidance. Anyway, our margin structure continues to improve. Hybrid bonding adoption, last but not least, and use cases increase in logic, memory, co-packaged optics, and also in consumer. Remember Apple announcing the M5 in a hybrid version. There are three revenue streams emerging, each with attractive growth profiles. What I mentioned before, the 2.5D assembly equipment growth expanding due to strong data center rollout and photonics demand, the Asian subcontractors, all for the current AI application. 3D assembly gaining traction, next generation AI use cases, and more than more architectures. Traditional mainstream is improving. We see that with all of our end customers, and that also has an impact, a positive impact, on our growth year-over-year. Multiple drivers converging to accelerate the hybrid bonding growth. As we all know, in logic, it started. The reason, again, very simple, bond pad pitch limitations causing a switch from a reflow process to a hybrid bonding process, has been the driver in the past 10 years, the first early adopters, AMD, and then gradually expanding their product range, but then Broadcom and Apple, Intel, not to forget, they're all moving into hybrid bonded device architectures. Chris Scanlan will explain much more. NVIDIA Feynman, those of you who have seen that roadmap issued about one and a half months ago, clearly tells you that hybrid bonding is the way to go. In HBM, stacking, HBM4E, like we shared with you end of April, it's critical in the next few months to understand, will that lead to a major mainstream volume or will that still be in sort of a niche part of that application? But as every one of those three explains the world, sooner or later, that switch to a hybrid process will become a fact. We have co-package optics. The COB at TSMC is one of the major parts of expansion of our business. We also shared that at the end of April, orders in Q1 received, and that is where we also have a lead in terms of new technologies. Adjusting our operating model, a switch to cost. To be prepared for further growth in this industry, we have always used a simple method, doubling each time. This time we should probably prepare a bit more than double. That's all in place. Also what we have shared last year, if you share a model, that model should be in place. Otherwise, you're sharing a model which still has to be developed. That's key to understand. Where we have all organized that operational part is in Malaysia, is in China, coming up Vietnam, supported out of Singapore, and evermore support center close to the big end customers, of course, Taiwan, U.S., not to forget, for Intel, but also Micron and others, and coming up, TSMC. You have, in Korea, the support for the Korean customers. The targets, again, increased by about 15% versus last Investor Day. All identified business, identified customers, where we also have demonstrated and process of reference positions, and that should help to bring our company into the next phase. Some nice slides about CAGR. What is to be expected in the RDM foundry capacity to double by 2030. If you look at the different green colors, you see the bottom end is advanced logic and foundry. That's where we are ever more established. The lighter green part is what is supposed to become far more clear in the H2 of this year, with enormous growth potential. We see also, on top of that, the discrete analog and other. A major market development model, it's all about this build-out has caused a multiple-year investment in infrastructure. Take TSMC's comments, Broadcom, Applied Materials, and also NVIDIA. That is basically supported. If you look at our model, it is tied very closely to this model, of course. That the industry tide has turned very rapidly is very nicely shown in this graph here, where you see from Q1 2023, 2024, 2025 last year, all of a sudden, that's simply because of memory, an enormous supply, an offset with not sufficient production capacity. The same we see here with unit growth, an enormous trend up. If we look statistically, there's always sort of a peak which should follow at some point in time. I won't make any forecast today when, but if history repeats itself, that is what you should be watching out for. Assembly equipment follows the same pattern in many ways, a bit less aggressive compared to front-end. You also see here from a EUR 5.4 market size in 2025 towards EUR 8.3 in 2028, enormous increases, that's where we certainly will benefit from. We see an enormous list of new advanced packaging fabs being constructed in the U.S., in Taiwan, Korea, India. Simply name them, Singapore, China, Europe, Vietnam, Malaysia. Enough of opportunities. They won't come all at the same time on stream, but at all of these customers, we are in a very good position to benefit from the investments in those capacities. This famous slide takes you back to 2006. Some of you have witnessed this trajectory all through the 20 years, and I am very happy that you take the time to visit our Investor Day once again. What you've seen here is a wonderful cyclical development, four years, sometimes a bit longer, but that's a typical pattern. If you look at the gross margins, where at that time we were proud to reach 40% in a quarter, but usually below 40%, then in the next 42%, 56%, 62%, and as we guided for Q2, we should be again above that level. Our next growth period, hold on one second, is in the cards with, as things look now, potentially higher margins. Where does that come from? Number one, we've learned over all those years to focus ever better on advanced packaging opportunities. Where can you make a difference compared to our competitors and peers in Asia? Simply focus each time on the next-generation devices and in the three markets, the computing part, communication, automotive. Having done that systematically, every three years redefining our strategy, that has improved our focus tremendously, engaging the customers in the early stages, also customers supporting that development financially, at the same time working on a better cost model. The cost model, multiple sourcing, production in Asia, headquarters in Malaysia production, China, Vietnam coming up, a global supply chain, which is simply based on a concept, multiple sourcing, I said, evaluating that constantly. That delivers you an average growth higher than the industry and also margins substantially above any of our competitors. Some more data here. If we compare Q2, Q3, Q4, and Q1 2026, you see the order intake, two quarters now, 250+. The revenue is certainly climbing. If you look at our cost structure, it's intact, that's what we have guided also for Q2. Basically, these financial metrics tell you how we run our company. Market shares. You all want to know market shares. As we have said many times, a market share is an end result. We look first at the margin potential because the margin is where it's all about. Return on capital, ultimately, if you do that right, you see that your market share continues to grow, which is in a way very illustrative for Besi. If you take the addressable market, the die attach, the advanced die placement market, gradually improving the overall share simply through selecting the best applications. Long-term outlook enhanced by increased hybrid bonding use. This gives you a snapshot, but Peter Wiedner and Chris Scanlan will give you much more detail of those customers which have adopted now in logic to a large extent, but also on the brink of adopting that in memory stacking, some chiplet architecture. Remember, we now have over 20 customers who have bought hybrid bonders from us for all kinds of applications. Mainstream volume is, of course, in Taiwan, most established, then Intel with 30 bonders in six automated lines, and gradually picking up for other applications. The adoption, as said, is expanding. We're now at 20, and we have listed these customers also for the different applications: logic, memory, photonics, R&D purposes. But again, more about that in the presentation of Chris Scanlan and Peter Wiedner. Increased R&D spending. Of course, with all these wonderful applications, and ever more complex, you see a gradual increase in R&D spend. You see on revenue levels of 2025, so close to EUR 600, 14.8%, in 2020, below 10%. If you look at the trend of order intake and you simply divide that by the spend in R&D, you can easily calculate that that, in line with the revenue development, will change. But the key is, are we investing in the right end applications? You can easily conclude that if you look at the end margins. The focus is right. It is gradually increasing, ever more complicated. Look at the hybrid bonding, the 50 nm, also Fluxless TCB, the flip chip multi-module attach. So many applications which are in the mainstream and will provide us significantly more opportunities to add to the total model we shared the updated version this morning. That ends my presentation. Chris Scanlan, it's your turn. Thank you. Thank you very much, Richard. Hi, I'm Chris Scanlan, I'm SVP of Technology at Besi, and first of all, thank you for joining us here today. Thank you also to everyone on the phone or online listening. I'd like to share with you our view of the market, some of the applications specifically that are driving growth for us and creating opportunities for us, and most importantly, what's changed in the last year since we last spoke together. First of all, what's changed since last year is the AI market has taken off really faster than we expected, for sure. I think last year when we presented the semiconductor market forecast, we're expecting about EUR 1 trillion in revenue by 2030, which was also impressive. But it looks like we're going to hit that and exceed that already in 2026. TechInsights anticipating EUR 1.4 trillion already this year. That's a material change. A lot of that is pricing, of course. Memory pricing is much higher. Underneath, there's also unit growth, so about 25% increase in units month-over-month in April of this year compared to the last year. Overall, this is really driving opportunities for us, and TechInsights anticipating EUR 2 trillion by 2035. A lot of forecasters, including TSMC, are looking at EUR 1.5 trillion by 2030. Pick a number, but what's really driving it is AI infrastructure. There's a massive build-out ongoing right now. I'll explain why, but it's supporting training and inference using these models for productive purposes, as well as all the AI-enabled devices that interface with these models. So things like mobile phones, computers, physical AI devices like cars and robotics as well. How do we measure this adoption rate of AI? I think the best way to measure is the output of the AI factories. Excuse me. AI factories produce tokens. Tokens are little bits of information. A token is approximately a little bit less than one English word worth of information. This chart from Goldman Sachs shows a forecast for token usage coming out of AI models through 2030. The top-line number is 120 quadrillion tokens by 2030 per month. It's hard to even imagine what that means, but to put it in perspective, the Library of Congress in the U.S., which is a pretty big library, all the printed works in that library would consume about 3 quadrillion tokens. Already right now, we're producing more than that per month using AI models. It's already a really big capacity, and it's going to continue to grow. Why? Because these things are very useful. When we first had ChatGPT in December 2022, we could do some really simple things with it. It's kind of fun, but we couldn't really do much with it. Really, I would say in the last year, that's really radically changed, and we're all using AI now for really productive purposes like coding, like actually creating products. This is driving demand. The other thing that's driving demand is in November of last year, there was an introduction of something called OpenClaw, and that was really the first kind of tool that allowed people to make agents in a very simple way. What is an agent? An agent is something that can automate the use of AI and do it in a logical stepwise function. It kind of amplifies our ability to consume tokens. That's really what's going to drive the consumption in the future. It's no longer dependent on us humans to take some action in front of the computer. In order to create that capacity for tokens, we need hyperscalers to invest in CapEx for data centers, because data centers are the factories that make tokens. I'm showing some data from TechInsights, and there's other forecasters as well anticipating about a trillion in CapEx spend per year by 2029. Some of you earlier today in discussions told me, "No, it's going to be 3 trillion in two years." I don't know, but it's a big number. All this is having an impact on Besi and our end markets. Where do we see our business coming from? If you would've looked two years ago, it was 30% mobile. That was the biggest market for us, and probably extending 10 years prior to that. We were really driven by the mobile market. Currently, because of the AI build-out, we're more than 50% computing this year, and mobile's only 16.7%. If you look at what kind of devices and what kind of products we're supporting, it's all the components that go into these AI factories. What's an AI factory? An AI factory is something that takes electricity as an input and uses computers to output tokens. That's the output. These factories are enormous. This is a picture from NVIDIA's keynote at GTC. Some of these factories have over 100,000 servers, 100,000 GPUs, and there are typically multiple of these buildings on a campus. The biggest ones are talking about using five gigawatts of power, so it's massive power consumption. Therefore, we have to do everything we can to create our devices to perform as energy efficiently as possible to produce the most tokens per input power. What kind of devices are we talking about? It's things like we all know, GPUs and accelerators. These are the things that can do really mass parallel mathematics, made by companies like NVIDIA and AMD, all the hyperscalers as well. CPUs, also very critical. These are the devices optimized more for stepwise computing functions following a list of commands. This is becoming more and more important for agentic AI, because in agentic AI, we're not just calling a model to do something, but we're actually logically creating a stepwise launching of multiple agents, multiple model steps in sequence, and for that, you need CPUs. You have memory, HBM memory, of course. That's what's storing all the parameters for these models as it goes through the sequence of processing and creating the model, and then the inferencing for the model. Of course, we need to connect all these computers together because they all have to function as one device in this massive building. For that, you need networking. You need network switches. These are really high-performance ASICs that direct the traffic, basically the data traffic within the data center and within the rack. Finally, another aspect of networking is the photonic transceiver. That's basically the thing that you plug your fiber optic cable into. It takes the light out of the cable, decodes it, makes it an electrical signal, and delivers that to the switch. Besi's involved in all of these, and I'm going to describe a little bit about what's happening with these devices. One thing that's happening is in parallel with this big demand for AI, there's another phenomenon that's driving our growth, and that's kind of the death of Moore's Law. If I had to put a time of death, I would say about 2023 based on this chart. This chart is looking at the maximum size of flagship products coming from NVIDIA and other customers, other high-performance computing IC suppliers. You see up until about 2023, culminating with the NVIDIA Hopper, that was the H100 generation. All these devices were basically fabricated on a single chip. In this time frame, they were very close to the maximum possible size that's defined by ASML's reticle size, basically. Starting in 2024, all that was no longer possible. It was no longer to scale transistor performance adequately in order to increase the number of transistors needed for the next generations. Therefore, you see every device now exceeding that reticle limit. That means that the devices have to be split into multiple chips. Once you do that, you split the devices into multiple chips, then you start looking for ways to optimize what function do you put on this chip versus that one. We call that concept chiplets. That's splitting devices into multiple chips using different process nodes to optimize cost and performance, and then using advanced packaging to put it all together. That's what we help with. This market, the chiplet market, is growing at a 69% CAGR. This is a view of what the hyperscalers are doing. The hyperscalers are not just buying, of course, they buy a lot of devices from NVIDIA and Intel and so on, but a lot of them are also developing their own chips optimized for their own AI workloads. Companies like Google, Amazon, Microsoft, Meta, all developing their own chips. The reason is simply to increase the efficiency and reduce the cost of producing tokens in the data center. What they all have in common is they're all very large devices, mostly multi-chip, and all using advanced packaging, 2.5D and 3D packaging. What does that packaging look like? Well, I've shown you a picture like this before, but all these packages, all these devices, are using a variance of these kind of 2.5D and 3D assembly technologies. The important thing is that they combine multiple different bonding steps, die-attach steps in the same product in order to combine all these devices together. There's different types of bonding required depending on which layer of the interconnect you're talking about. Starting with hybrid bonding, there's multiple use cases inside these systems. I'll draw your attention to the center top. You have the SOIC, so this would be fabricating the logic device itself, for example, a CPU, GPU, in a 3D configuration where you have a base die with a certain function, could be SRAM or IO, and then maybe the processor cores, a smaller chip that's placed on top. The most effective way to make that connection is using hybrid bonding, and I'll explain why in the next slide. This fabrication of 3D ICs using hybrid bonding. The next application of hybrid bonding is in HBM. This is a future application we expect with HBM4E, hybrid bonding there will allow us to integrate more chips with better thermal and electrical performance, and ultimately higher performance for the whole system. Finally, in the CPO, or co-packaged optics application, hybrid bonding is also used. Let me just explain what CPO is a little bit, because I know there's a lot of interest in this technology. Basically, what we're doing with CPO is taking the light from the fiber optic cable and routing it directly to the package. We have a fiber optic connector on the top. That little blue line represents the fiber. The fiber is attached, or an array of fibers are attached to the top of this chip. There's little mirrors etched into the silicon that direct that light down into the bottom chip, called the photonic IC. The function of that chip is to capture that light, turn it into electrons, then it has to go up into a high-performance processor. We call that an electrical IC. That processor has the job of packaging that information, communicating to the ASIC very quickly. That whole thing is done using hybrid bonding. The EIC is connected to that photonic chip using hybrid bonding. I'll show you an example of that from NVIDIA in a minute. Once we've done all that, we still have assembly to do, right? We have the SOIC, we have the HBM. We have to assemble it onto an interposer and test that thing. That assembly process involves placing all these components onto a wafer. That's why we call it Chip-on-Wafer. This blue interposer represents a wafer that our machines place both the HBM and the die onto. That's a very important process as well. We have different ways of doing it, either flip chip, which is done with this Cameo Flex machine that Christoph will tell you about, or thermal compression bonding using our TCB-Next. In many cases, in a growing number of cases, you also have components assembled into the interposer. CoWoS-L, for example, you might have heard of. L stands for local silicon interconnect, that requires machines to place those local silicon interconnects very precisely inside the wafer. That's also done with this Cameo Flex machine, which we're introducing. Finally, we have to assemble all that onto a package substrate, also using either flip chip or TCB. None of this is a surprise to us. We've been working for the last number of years to develop all the equipment necessary to enable all of this. For our business, what this really means is that the capital intensity, the number of machines customers need to make these products is really increasing rapidly. If you simply look back 10 years ago, your NVIDIA GPU, your Intel CPU was typically one chip. We call it a system on chip. Every year, we put more transistors in there through Moore's law, but that started to break down, the first step was to integrate these devices in multiple chips, call that MCM. Currently, we're now working on 3D stacking chips on top of other chips, then further assembling those into the package. The next step now is adding optical interconnects into the package, which adds even more intensity to the whole assembly. More steps, all those steps requiring more accurate equipment, which tend to be more expensive as well, all adding to the capital intensity. We have different choices how we assemble these devices. In the case of 3D IC, 3D IC meaning integrating two logic devices or logic and memory together in a vertical way, really, the process of choice is hybrid bonding. In hybrid bonding, we create a direct copper-to-copper interconnect between the back end of line copper structures on both devices. There's no other interfacial material. It's really functioning as if it was fabricated on the same device. Because of that, we can achieve much higher interconnect density, we can drive the pitch down because there's no other materials in there, all the way down today to 6-micron pitch, even down to 1- micron in the future. The interconnect density is much higher. The speed is higher. Ultimately, the energy-efficient performance of stacking using this method is 100x higher than it is for TCB. For those high-performance computing applications, this is really the method that is being pursued. Even for memory applications, I'll show you how hybrid bonding helps to improve the thermal resistance, which improves the overall performance of GPU devices. For these reasons, hybrid bonding is really being adopted as the primary method for 3D IC. I just want to share with you now a few examples of the kinds of devices that are using hybrid bonding and how and why. Starting with CPUs and GPUs, which are separating the core compute function and the SRAM and IO function and putting them back together with hybrid bonding. The reason they're doing that is because SRAM is really critical in these systems. We talk a lot about HBM, of course, but really, SRAM has a critical part to play in these computing systems also, always has, and provides a very high speed, high bandwidth connection to the logic that is needed for certain compute functions, not as high capacity as DRAM, but very critical and getting more critical as we scale. The problem is that SRAM doesn't scale very well as we go to advanced nodes, particularly as we make the transition from FinFET to gate-all-around kind of transistors. This data from Fujitsu is clearly showing that you really don't benefit by scaling SRAM to an advanced node. Actually, you can have performance degradation. The solution to that is to keep the SRAM on a trailing node, like 5 nm or 7 nm, and then use the advanced node only for the logic cores, and then hook them together using hybrid bonding. That does a few things. Number 1, it improves the overall performance of the device, but it also reduces cost because you only use the advanced node for a smaller portion of the design, in this case, 30% in the Fujitsu design, and the rest of it, you can use a trailing node at lower cost. Intel is using this method, you can see also, for their new Xeon 6+, formerly known as Clearwater Forest. In their case, they have the most advanced node being used for just the compute tiles. They bond 12 of those things using hybrid bonding to a base tile, and that base tile is doing the function of IO and SRAM. The next type of product will be GPUs. Hybrid bonding already used by AMD in their GPU products, the MI family, MI350, MI355, and so on. We see them continuing to expand the use of hybrid bonding and extend the design rule capability. They're already now down to 6-micron pitch, for example, with their interconnect, using the BESI Equipment. What we see in the future is other kinds of GPUs that have traditionally been single chip. NVIDIA now has die-stacking on their roadmap for the Feynman GPU family, which is due out in 2028. In addition to custom HBM, custom HBM means, I'll explain a little bit in a minute, but we anticipate that custom HBM will require hybrid bonding as well. Broadcom also has announced for their custom ASIC customers, they do a lot of work for hyperscalers in developing accelerators, that they have adopted this 3D IC technology along with TSMC, and they have multiple customers in development. The concept there is very similar, stacking just the accelerator functionality onto an SRAM die or an IO die, and by that method, reducing the total cost and increasing the performance of the system. We expect multiple announcements from them in the coming year or so. Then there's co-packaged optics or photonics. This is taking off faster than we expected last year. I think last year we showed you this picture on the upper left. This is NVIDIA's Spectrum-X network switch device. This is a network switch for scale-out networking. That means connecting different server racks to each other or different clusters to each other inside the data center. What that entails is, first of all, they have a big network switch ASIC in the center of this package, but all the small squares on the outside of the package that I'm pointing to are co-packaged optics chiplets, just like I described in a previous slide. They're fabricated using hybrid bonding. In this one example, there's 36 of those. That means 36 hybrid bonded chiplets associated with one network switch. What's new is that it's no longer just NVIDIA. NVIDIA's in production, but so is Marvell using the same kind of technology, there's many other technology, or switch companies or CPO technology providers working on similar technologies using hybrid bonding. We think this is a really big market, but even more exciting is the use of CPO in scale-up networking. That means connecting GPUs together within the rack. That's a much bigger, much higher number of connections, this has been announced also for the Feynman generation of GPUs from NVIDIA. They have a dedicated NVLink network switch, or not a network switch, but a switch for the scale-up networking. What this will require is not only the switch device, but also CPO components directly associated with each of the GPUs. You can easily imagine that this is a much higher volume opportunity, we expect this, like I said, in 2028. Next is memory. We've been discussing memory for the last couple of years, we still are convinced that the intercept for hybrid bonding for HBM memory will be in HBM4E, the first adoption, then a broader adoption in HBM5. There's been a lot more data being generated in the last year since we last talked, demonstrating the performance benefits of hybrid bonding in HBM. One of the main ones is the thermal performance benefit that we get with hybrid bonding. When you stack many of these devices, you have a sandwich of 12, 16, 20 layers. You have to somehow get the heat from the bottom ASIC out through the memory to the top, hybrid bonding is much more efficient because it doesn't have any insulating materials in between the die. When we use TCB, we have the solder bumps, not as good as copper, and then we have some epoxy material that's also filling that gap. Acts like a resistor. The more layers you have, the worse it gets. This data from Samsung shows with 12 layers, they were able to demonstrate a 30% improvement using hybrid bonding compared to micro bump for HBM. It's thermal performance, also higher interconnect density, which will become important for custom HBM and electrical performance benefits. For these reasons, we are convinced that this technology will be adopted, like I said, HBM4E then later HBM5. We're now starting to see hybrid bonding percolate into higher volume applications. This is a consumer application, for example. We have an example now from Apple. This is their M5 Pro, M5 Max family of chips for laptops. Really consumer devices, you can go down to the store and buy this. Maybe some of you already have it. In this case, what we're doing is placing a separate GPU and CPU chip onto a base silicon layer using hybrid bonding, then connecting those two with a very high density wiring layer in the base silicon die. You can see the picture on the right, the actual hybrid bond interface connecting the two devices together. You'll notice it's basically just copper. If you didn't know there was a bonding layer there, it would look like just the back end line metal and a chip, because that's what it is. It functions just like a single chip. What it allows them to do is two things. One is they can mix and match, they can take a CPU and combine it with different GPU configurations. That's how you get a Pro and a Max. Only one CPU tape-out and two GPU tape-outs. Secondly, it reduces the size of the individual chips, increasing the yield in the factory and helping to reduce the cost of the silicon. This is really a cool application, we expect more of this in the future. AMD is also continuing to use hybrid bonding, they're increasing the use, they're basically adding more hybrid bonded chiplets into their desktop gaming CPUs, they're able to do that because they've improved the performance. They don't have any losses like they used to associate with thermal issues and so on. It's really functioning well for them. That's about hybrid bonding, it's not all about hybrid bonding at Besi. AI is offering many other opportunities for us. CoWoS is one of them. As I mentioned earlier, after we do the hybrid bonding, we still have to assemble into a package. For high-performance computing, the main method of packaging these different components together is CoWoS, chip on wafer on substrate. This is really exploding now in terms of demand. There's a 50% CAGR expected between 2025 and 2030 in terms of the wafer demand. One example of these kind of products is shown on the right. This is the next generation Venice CPU from AMD. What you'll see there is CCD is basically the CPU core. They combine eight of those together with two IO die. They use different nodes, cheaper node for the IO die, which has bigger area, and the most advanced node for the compute die. Then they have some additional chips along the side. Altogether, there's 18 chips that we have to place onto that one unit. For one CPU, 18 bonding steps, plus we still have to bond that wafer assembly onto the substrate, 19 bonding steps. It's easy to see how this drives a lot of demand, we've developed a very high productive machine for the specific purpose that Christoph will share with you. Then we have the mobile segment. Mobile is projected to decline in terms of the overall market this year. Nevertheless, there's always opportunities where we see technology transitions happening in this market. One example would be with the application processor. Typically, this has been a vertical structure where the memory is attached on top of the logic device. Because of the increased need for memory in AI-enabled phones, also the increased power dissipation of the application processor with more neural processing units and things like that inside the chip, there's a transition to the side-by-side structure that offers opportunities for molding, for die attach, and a lot of the different process steps we have at Besi. Other configurations are wafer-level assembly, which take advantage of the same capabilities I just mentioned earlier. In the mobile memory side, we typically haven't played there at Besi, but what's changing now is that the demands on die placements are increasing, meaning that more accurate chip-to-wafer assembly processes are needed in order to create these new kinds of mobile memory structures. There again, our equipment comes into play. Then finally, the smart eyewear is a kind of a new device type that we see opportunities in. Why? Because it requires very high miniaturization, high accuracy placement, then in the case of the glasses with display integrated, you need to have a light engine that can also take advantage of hybrid bonding. Still a lot of opportunities there. Then finally, in our core business, there's growth still happening in automotive, starting to come back and we see, for example, in the powertrain and electric vehicles, silicon carbide, gallium nitride type modules being used in ever more complex structures. We're very much engaged in both the die attach and packaging of these kind of structures. Same with data center. I talked about all the advanced devices in there, but there's a lot of power management in data center. You don't want to have waste in your power management, because it's very power hungry. There's a lot of unique packages that require things like diffusion bonding, where Besi has a leading product offering as well as high-precision molding. Okay. I think I'm a little bit over time, I would just like to leave you with a few things. One is that all these opportunities are really exciting for us. We've been preparing for this for a long time, I think it's a great opportunity as the market is taking off and growing for us to capitalize on it. I think I'll leave it at that and turn it over to Peter Wiedner. All right. Welcome, ladies and gentlemen, to our this year's CMD presentation. My name is Peter Wiedner, I'm responsible for the submicron business. The ones of you who are following Besi since a while and also are participating here, you might more perceive me as Mr. Hybrid. I can tell you, I had a great last year since our last meeting because wherever I went, people said, "You're the right guy. I need hybrid." If I would recount all the meetings that I had from the last year here, we would be still sitting here tomorrow. I want to start with a quote out of a summary from the ECTC 2026, just roughly a month ago in the U.S., one of the most important semiconductor conferences for that arena, which is saying in the summary, actually, memory bandwidth, chiplet-to-chiplet latency, synchronization overhead, and energy per bit now shape overall efficiency in multi-die AI architectures. Bottom line, hybrid bonding directly attacks all those bottlenecks. It's also kind of a summary to the explanation, the technical explanation that Chris Scanlan has given in his section, but that's really the summary of what's going on in the market right now. We at Besi, we have been a very early believer, and for that matter, early adopter of hybrid bonding. For that reason, already years back, we have brought the very first hybrid machine on the market, the one in the left upper box with stated number 1. This was a 200 nm machine, and that was the first machine where hybrid bonding and volume manufacturing did start for logic devices with roughly 9 micrometer bump pitch. Our second generation, which is the actual generation today, the second one, with increased accuracy, 100 nm, and relevant for logic devices for 6 micrometer bump pitches, is the industry standard today. I'm very proud that also this machine will be the starting point for high volume manufacturing in memory business, in HBM business. For sure, in HBM, as you are aware, the bump pitch, and with that the accuracy, is a little bit more relaxed, but in difference to the accuracy, the productivity matters much more. That's the reason why in the gray bar, we are counting on the productivity or the units per hour that the machine can produce. While we are doing that and helping our customers to ramp up their productions, we have been developing already the next generation in the meantime, which we call the N 50, N 50 for 50 nm, which will be ready for logic devices with even smaller bump pitches in the area of three micrometer. That's very important, at the same time, this machine generation, where we will start actually the beta test at the customer site this year, will at the same time not only be more accurate but also way faster, which is, once again, very important for the HBM segment of that market. We are not done with that. In parallel, while we start launching this machine, we are already working on the next generation thereafter for even higher accuracy and more speed. Why I'm showing you this, because this is a unique roadmap and a unique product line-up actually in a very short period of time, that no other competitor of us is matching. While we are still having all these experiences and improving generation by generation, they are still fighting to make their first inroad. That's really our big advantage and our strong competitive position. That is not all, because that's what I'm showing you, that's the bonder. That's one step in this whole hybrid chain of manufacturing. As you are aware, there is a lot of machines involved, and also the pretreatment of the die and the wafer before it gets to the bonder is a very critical part for a successful hybrid bond in the end. For that reason, we have teamed up a long time ago with Applied Materials, you are aware of that, and together we can offer not only individual machines, but really a complete system, which is doing the pretreatment plus the bonding and, by the way, plus the measurement after the bonding, so the quality assurance. That's the integrated system that you see on the bottom here, which is our shared AMAT and Besi system, which is called Kinex. Why is that important that this is an additional offering as well? The more chips you have to put together, and you heard some examples of Chris where this is happening, where the packages are getting more complex, the yield is even more difficult to achieve, and an integrated system simply can help you to maintain a high yield, even in a complex package. That's the reason why that one is very important as well. Nevertheless, there is one more aspect to our partnership that we are having with Applied Materials, and that's going a totally different direction, and I would even consider that perhaps even more important than the product offering. Since ever we have been engaged with Applied Materials, we have started together a joint development activity, we call it the Center of Excellence in Singapore. For sure, that lab is equipped with everything, our own integrated equipment, two pieces and five bonders, all downstream and upstream equipment that you need. The aim there is really to do research, not on the bonding, but on the hybrid process itself, because it has a lot of ingredients. It starts with the material, with the layers that you take there, once again, the preparation. You all need to understand that to make a solid hybrid bond in the end for a volume manufacturing. This lab is utilized by us to learn that, to understand, also to research, to come up with even better hybrid processes. At the same time, we are engaging in this lab with our end customers who want to do hybrid bond and help them to develop their packages with hybrid bond interfaces inside. So far, we have been engaging together, Applied and Besi, with over 25 customers in our Singapore lab. You see a nice correlation, by the way, to Richard's chart, where we already have now 20 active customers who have bought machines from us. That is also driving, actually, the hybrid adoption into the market much faster with our help and our activities. Talking about customers, let's go to the market, and let's see what happened in the last year in the market. Let's start for that matter with the logic side. A lot of things Chris has explained, and I can summarize them here a little bit. What we definitely do see on the logic hybrid side is that a lot of use cases have been materializing throughout the last year, and I'll get to that on the next slide. If I would sum that up, you could say two things. One thing is that hybrid interconnect technology for AI logic devices has become, and is confirmed to become, the predominant interconnect technology. You can name it, AMD, Intel, NVIDIA, then also the Meta, Google, all the ones who are doing their own chips, and you saw also one example of that in Chris' presentation. That's very clear, very obvious, straightforward. Perhaps also looking a little bit back in history, nobody would have doubted that this is the primary area where hybrid bonding does make a lot of sense. I also do remember in some of our previous presentations like that, I got the question, "Well, what do you think? Will hybrid also enter, let's say, a consumer market, for example, into our laptops?" That was not so easy to answer back in the days, because even so the very first hybrid device from AMD was a consumer device, it was a graphics processor. There was not really a lot of activities visible for follow-on. Now this year, with the launch of Apple's M5 high-end processor group, which you, by the way, can already buy now at the market in a laptop, it's very visible that what we thought all along, that on the high-end segment, hybrid will penetrate the consumer market, that this also has been happening throughout. In that case, the announcement was this year. Once again, coming back to some of the use cases, I want to use and to show you the latest ones. I want to go back to a chart that we have been showing you two years back in this meeting here. Back then, this chart was on increased section, technically, trying to tell you how it typically, the development of a processor evolves. From an SoC system on chip, so one chip, to two or four chips, which we called it back the split die, in order to get more compute power, but without hybrid interconnect, all the way then to the chiplet architecture, where you then use hybrid bonding. Back then, two years ago, there was only the EPYC from AMD, which you see on the right upper side, which was confirmed and in production. We said, "Well, that's a pattern, and that will happen to all of them, one earlier, one later." Only Intel back then had announced their internal Clearwater Forest architecture. That's not an end product, that's an architecture that they are working on. It didn't have a sellable product. Really what happened in the last year was that all of this, what we predicted two years ago, came together. Intel finally launched a real product based on their architecture of Clearwater Forest, the Xeon 6+. As I mentioned before, in the consumer market, Apple launched the M5 Pro and the M5 Max. Finally, that was also very often a question, well, what will NVIDIA be doing? Very interesting, because it's obviously one of the biggest suppliers. They don't have a product here today, but they announced with the Feynman architecture and product lineup that they will use that as well. It's very clear on the logic arena, to sum it up once again, adoption, the use cases are there. They have been announced. You can already buy things today, and that's just moving along and the adoption rate will increase. Now, let's move from logic to another segment which was way more discussed over the last years than the logic arena, and that was the memory, the HBM. You remember the times when said, "Yeah, hybrid will come," then there was the height topic and, "Yeah, you can make higher stacks." Everybody said, "Ah, with the higher stacks, you still can use TCB, and that's not good for hybrid," and all these discussions in the past. If you look at what really happened now, and once again finally this year, is that for the pure technical benefits that Chris Scanlan pointed out, and I just wanted to sum it up in one sentence here for, because the hybrid enables a lower power and a better heat dissipation, and that's up to 30%. That's such a big advantage that the manufacturers of HBM can then turn either into faster memories or into more memory in one stack that everybody wants to use that. Also in addition, Chris Scanlan explained it already, these custom HBM with custom logic underneath, which is driving the bump pitches down to a smaller level, and we predict roughly around 12 micron, which is then much closer to a hybrid interconnect than to a TC interconnect. Also, that is speaking a language, the same language. Once again, that's just a technical summary. What did happen last year or in the course of the last 12 months? Finally, all three leading suppliers are seriously doing research and seriously evaluating hybrid bonding for HBM memory. By the way, they all do it with our machines. For sure, some started earlier, did start earlier, some a little bit later. The early adopter or the front-runner is already very far in his research, and you can read his announcements also. He's also very proudly announcing that, and it's very clear that the first one will adopt the hybrid interconnect in HBM4E in 2027. It's very visible, well, to the outside world, but also internally, because he's already starting preparing his factory for high volume manufacturing. For mass production, for sure, in advance, so that, in 2027, he can start to deliver That's a very clear signal and a clear message that the question, if hybrid will come for memory, yes or no, that question is answered. It will come. Now the matter of fact is, well, how fast will it come? For sure, you can have different models to that. On a higher level, one thing is very clear. Once again, why do you want to use that? Because you get a better performance. Now, every new HBM generation is defined by better performance data. That's the reason why there is an HBM5 and then a 5e, because it always gets faster and more memory. That means with every successive HBM generation, you will use more hybrid interconnect because it simply helps you to achieve the target data and the target performance of the HBM die. Once again, starting with HBM4E, the start is just around the corner. Also there, very exciting and great news. I have to tell you, the most exciting one is the CPO topic that was already mentioned. If you remember our last year's presentation, I had in my section, a slide where I was showing actually also that picture and a little bit more on the technology side and saying, "Yeah, these co-packaged optics, there is some advantage and packages are being developed, and TSMC is doing this COUPE." They call it COUPE. In the end, if you look at our last year's presentation, it was really more telling you an R&D is ongoing in that arena. Now, within one year, we are from an R&D stage to volume manufacturing. Because, as Chris Scanlan pointed out, you can already buy from NVIDIA, the Spectrum-X or the Quantum-X, he showed the picture as well. You can already buy that today, it's already there. In one year, in no time, from zero to hero, that's even for our fast-paced semiconductor industry, extremely fast. Let's have a look at it, perhaps why it went that fast and what's behind that. Not technically perhaps, but in general. I think there are two major factors. One factor is there are these undisputed advantages for the end customer, not for our customer, but for the end customer who is using the interconnect, because, as you can see from that conference slide from TSMC, if you take a CPO and you put it on the right place, you can really gain up to 10x greater power efficiency and 20x lower latency. You take less power, and you get a higher speed at the same time. Thinking of the huge effort that a data center today has and the power consumption, there's a huge drive, really from the one who is using these devices that he wants to have that. That's always good if the end customer wants something. That's giving a big drive, number 1. The second drive, which is also very important, is the people who have designed these packages. Once again, COUPE, as an example, as the most important example, they did a very smart job because they designed a package which is using a lot of technical ingredients, which are already there today. That brings that package to a great scalability and a very fast scalability. If you just take that one interconnect that we are doing with hybrid here, as you've seen, there is more to that, but if you just look at that one, you do that with the same process, with the same machine like you do a logic hybrid. That means you don't need to develop something in addition, like you need to do for memory, for example, because the stacking of memory has some special challenges which need to be addressed in R&D. You just take the same machine, you put that device on it, and you bond it. Done. That means the ease of scalability is also the important ingredient which allowed this fast adoption. When I say it's in mass production, and if you look at the right chart here, which is a prediction of forecast, it's saying 0.2 million devices this year. Well, it's the starting year for that device, so no surprise there. Comparably to what is predicted four years ahead in 2030, that's a very low number. Because the prediction of these market forecasters is that this will be a market of around 60 million units a year. That's a huge growth rate of a CAGR of over 300%. For that matter, that the speed of HBM and also the size that can be achieved with that specific market segment, that's the reason why I'm saying that's for sure the most exciting development for hybrid in the last year. With that, for sure, we have also increased our market model that you know. Every year we are presenting that. Last year, I had a little bit of CPO in, by the way, so it was not zero, but it was very modest, and I also had it in the high case because it was not sure when it is coming, how much it will come. For that reason, you don't put it in the low case. Now, a year later, I can easily put it in the low case, and for sure, with much higher numbers behind. For that reason, the low case, so the logic with all its adoption plus the CPO, we can increase that for 18% versus our last year model. Like always, we are adding the memory part to that in order to come to the mid case. If you will compare, you will see we did not change that much on the overall, let's say, number of machine assumptions there. I think because we always have been positive that this is coming, so we had that modeled in already. However, what is the difference is the confirmation that it will come is this year clear why you could have had a question mark last year. That means also the mid case is confirmed. I did not talk to any of these subjects or topics in detail, we are adding up the edge devices like smartphones, processes for smartphones, but also smart glasses, in order to come to the high case, which then increases overall by 12%. Just a comment to these edge devices. Once again, I did this year not prepare a presentation for that and spent the time. I did show you, for example, a lot of activities on the smart glasses last year. Just let me assure you, the R&D activities with the end customers of that is ongoing. We are still engaged with that, but that's a little bit more of a development work to be done by the end customers, so that's taking a little bit more of time. That's the reason also why the high case curve is not kicking in this year, but only a little bit later because these devices still need some development time until they are getting to high volume manufacturing. All in all, a great increase up to a cumulative 2,200 machines, and also the low case, as I said, up to 1,150 machines. All in all, as I said, I had a great year. I'm not only responsible for hybrid, also TC, we are also doing a lot there, I want to give you at least a small overview over TC as well. You know, we do have an offering, not on the basic TC processes, but on the so-called Fluxless, which is, let's say, the most modern style of thermocompression process. We did expand our adoption over the last year to five customers, which includes customers for memory and CPO manufacturers. The interest in these Fluxless TC interconnect is really increasing, especially in the last three months. We get a lot of customer requests. With a new technology, you get a request for all kind of market segments in the end. I want to point out four relevant market segments for this future technology, that's on one hand, memory, for sure today, TC is normal in memory, that's the NCF, so the standard thermocompression process. We are engaged with one memory supplier to develop a TC Fluxless Interconnect package style. If you now think, "Peter, you just told me four slides ago that goes to hybrid," think of it, I said, not everything will be hybrid, and don't think only of HBM memory. There is more different memories out in the market than only HBM. You have to think on the whole memory market where this may play a role. For sure, the CoWoS, also mentioned and explained in detail by Chris Scanlan, which is today flip chip processes. When the CoWoS tiles are getting very big, you need to switch from flip chip to thermocompression because of the size. Once again, we need to consider actually the optical market with the CPO but also the transceivers because also here, these are very complex packages, and the transceiver has up to more than 10 interconnect steps that you need to do. Also here, some of them are poised to become TC, that's an interesting market. Ultimately, even so I agree that that's farthest out, but we are doing R&D with certain companies who are engaged with that already, that's for, let's say, I don't know if I can call it a semiconductor then, but also these quantum computing, let's call it tiles, need to be packaged in a way and need to have electrical contacts to the outside. Unfortunately, you cannot use, let's say, usual materials like copper. You need to take very special materials like indium, which are hard to make them connect. That's also some arena where Fluxless and inert gas TCP machines play a role, we have already made samples for that on an R&D stage. These are the four, let's say, most relevant segments that we are looking at when it comes to Fluxless TC. My counter is at zero here, I'm at the summary slide, that fits perfectly together. We can have a break and a coffee now. Before that, let me just finalize it. We have a perfect product lineup for hybrid. On the market side, the use cases for logic has been confirmed. On the memory side, the implementation, the first runners are around the corner. As a third one, the CPO has developed in one year into volume manufacturing and all these positive signals are driving up our market potential. For that matter, we have also increased our market forecast. I think with that I can, well, not close the session, but with that, we can go to the break, and after that, Christoph Scheiring will continue with the mainstream business. Thank you. [Break] Is it working? Okay. All right. Welcome back everyone. I hope you're still with us after the break. I'm Christoph Scheiring, Senior Vice President of Die Attach, and I walk you through the main updates for the mainstream die attaches. This is my responsibility. As my colleagues, I'll focus on the changes. You're following these Capital Market Days for years already, so you don't need the full story, only highlight what has changed over that last year. The message for today regarding the mainstream die attach is clear. Mainstream die attach is no longer only driven by the traditional semiconductor cycles. It is increasingly supported by structural AI growth. That's the clear goal, to make that transparent for you. What I will do is I will show you the drivers, I'll talk a little bit about technology changes, and certainly about the product portfolio and the positioning and why we believe we are able to capture those growth opportunities. I'd like to start here with a chart showing the end markets for the mainstream die attach and talk about the scale of the AI impact. Basically what we see is strong growth expected across various segments. This means it's not just about compute anymore, it's about the complete infrastructure that is driving growth from photonics to power applications and others. On top, we see also a second-order growth vector into smartphones and AI devices as those units or AI models are increasingly being performed on those devices at the edge. Altogether, means an increase in advanced packaging and more accurate, more complex, more sophisticated die bonding tools, and this is at the end where Besi plays a main role. China, important. China remains a demand pillar. This has to do especially with the effect that advanced packaging is even more relevant in markets where you are node constrained, right? What does that mean for the Besi, for the machine, the equipment market? What we see is that over that last year, the die attach intensity, as I call it, is rapidly increasing. If you look at those AI systems, what you realize is that we have more packages per system, and even more, if you look into the package, there are more dies that need to be placed per package. All that creates an additional structural AI demand on top of the traditional semiconductor cycles. Because of that, we have updated our model, the addressable market model, to a EUR 1.6 billion level by 2030, which is an increase of about 8% as compared to the numbers I have presented last time. What's also clearly visible is that the growth is concentrated on the advanced segment, which again plays well into the strengths of Besi. Talking about the portfolio, we are having a known slide. In the upper part, you see the volume drivers, the multi-module attach machine, as well as the flip chip lineup. In the lower part, epoxy and soft solder. What we see is that the growth is not evenly distributed. Obviously, strongest growth is seen in the upper part for MMA and flip chip, while the lower part, the epoxy and the soft solder remains important, no doubt about that, but it is a more moderate growth. Competitive positioning remains strong for all the segments whereby the Besi strongholds are always the accuracy and process capability. If you look at the big picture, the most relevant applications for us going forward are here in the flip chip part, the 2.5D CoWoS market. For the MMA, it's clearly the photonics part, and a bit scattered across the platforms, it is smartphones or in general, AI devices that are driving the business, and those are the three applications I'd like to dive into more detail in the subsequent slides. I'll start here with the 2.5D market, which over that last year, really has emerged as one of the major growth drivers for us. What we see is a strong growth going forward of about 50%, same as Chris Scanlan already has shown. Driven by clearly AI data centers. On top of that, we see modules growing very large, because of that, a technology transition to so-called CoWoS-L formats or architectures, which is seen as the dominant architecture going forward. This CoWoS-L is based on RDL interposer wafers, which require additional die bonding steps to place so-called bridge dies in order to create local interconnects, which means additional die bonding steps. This, together with the increased complexity, has a very strong and positive impact on the number of die bonding steps per system, at the end, this creates a driver for equipment demand. In more detail, a slide that explains this equipment demand or that driver. If we look at the next generation accelerator package, like shown here, we basically start with an interposer wafer with only a handful of components of units on it because of the sheer size of those modules. Then going into the module itself, you see there is a number of chiplets that need to be bonded onto one or two or even more bottom dies. Those dies later on go onto the interposer wafer, but that together with a larger number of surrounding dies, HBM dies, as well as chiplets and then some dummy dies. As mentioned already, we see also quite a large number of these silicon bridges that need to be placed, those are the dies that create the interconnect later on. At the end, everything needs to be bonded into the package substrate. What we see, while we had in the past a single chip process flow, now we look at very complex architectures with several layers of die bonding steps needed. In this case, you can count it's about 40 different steps, whereas one step in the past. This obviously creates a lot of demand for us. Besi is engaged and aligned with the needs on all those layers. We start at the upper end with our hybrid bonder to do the most advanced bonds. We have introduced new machines for the middle layer, our 8800 Cameo FLEX for the mass reflow, as well as for the highly accurate die attach steps that are needed in the stack. We have introduced our 8800 TC-Next for the TC-related flip chip bonds onto wafer level, as Peter Wiedner explained in his presentation. We have at the bottom here, an important platform, which is tool of reference for the interposer attach into the package substrate. Quite strong presence in the market already. Clearly from a mainstream perspective, this platform, Cameo FLEX, is the most relevant development over that last year. That's why I'd like to show you a bit more in detail what it is and what it can do going forward. It's basically building on the success of our leading Cameo Advanced, which is the tool of reference in today's CoWoS-like markets. It addresses additional markets such as bridge die, which I explained, but also panel-level applications. It's designed to provide best-in-class productivity on the one hand side, together with one micron accuracy, and these are basically the key ingredients needed for next-generation 2.5D structures. Over that last year, we made enormous progress. We have launched the platform. We have started engagements with several foundries and OSATs and are qualifying the system. OSATs are specifically relevant going forward. As you may have heard, TSMC decided to outsource their internal chip-on-wafer operations to their OSAT partners. Also that portion will go to OSATs, and as you probably know, Besi Mainstream has a well-established relationship with those OSATs, and many of them are using Besi tools. That's good news for us. Importantly, we have already been able to complete one of these qualifications, and I'm expecting the first purchase order any moment. You clearly see that platform is developing rapidly from product introduction into a commercial validation, and we believe that with the help of this machine, we will increase our share of wallet in this 2.5D market and capture additional markets such as the bridge die attach. With this slide, I'd like to turn it then to the next market, to photonics, and specifically to transceivers. Those units here, which basically sit at the end of every fiber that goes through the data center from rack to rack, and so on. Those transceivers are, because of the data center build-out, are seeing an enormous growth indicated in the chart here, 25% at the number of 100 million units already, and going forward, showing or expected to grow significantly overall with a CAGR of about 30%. What we also see besides the market growth, we also see a transition to 1.6 Tb transceivers, which are faster, higher transmission speeds. This is, and I will show that in a minute, increasing the die-attach intensity, which again, is a positive factor for us. Lastly, we also see new units coming up, so-called LPOs, Linear Pluggable Optics, which is a response to the ever-increasing constraints in AI, power constraints, I should say, in AI factories. Those LPOs are, from a packaging perspective, very similar to transceivers. However, their assembly requires higher accuracy, which is again, positive news for us as this is our stronghold. Transceivers represent an enormous growth opportunities for us already on an already high level, which we are seeing at this moment. Besi is one of the leading suppliers of assembly equipment for that market, and our 2200 EVO Advanced is the real workhorse there, used by all of the leading suppliers in this market that are listed here. Going forward, what we see, first, clearly the market expansion. Secondly, the transition to these 1.6 Tb transceivers, which is increasing the die-attach intensity and the graphical representation of that can be seen here. While a typical 800 gig transceiver currently used in many of the data centers coming from InnoLight is comprising four lanes of 200 gig each. We see in the next generation, the 1.6 Tb, the number of lanes is doubling. Again, that also means that the number of attachments per transceiver is almost doubling. Besi today, and I try to indicate that here in red, is already covering quite a number of different process steps. I don't read it out here, but it's a few of them. On top of what I just explained, we are targeting with a new development, EVO ONE, enabling higher accuracy as well as eutectic bonding. With that, we are addressing in the future even more steps, extending the scope as well. Basically having an increased scope, more die-attach intensity, and this in a market that is exploding, as Chris Scanlan said, is a clear demand driver, a structural demand driver for Besi, and that's why we are excited about that photonics market. Lastly, let me turn it from AI infrastructure to AI devices. AI is increasingly being executed at the edge on those devices. The market itself expected to grow significantly also. The main variant, the dominant device for the time being is smartphone and will be smartphone. However, others like robotics, automotive, or AR/VR are emerging as well. The one thing they have in common is that those AI devices are rich in semiconductor content. That basically means more advanced processors, more memory, better memory, and also sensors are typically also being better and more complex. From a packaging perspective, that means that we are looking at integrated functions and more complex functions on tighter accuracy requirements, which plays well into the strength of the Besi portfolio. Namely our EVO, which is used in smartphones, but also increasingly in AR/ VR devices, into our epoxy platform, which is heavily used in the sensors in power management, power amplifiers for smartphones. Lastly, in the flip chip portfolio, which is used in the processor packaging, in the memory packaging, and recently being introduced even in a camera package. Talking about camera, we are also seeing camera innovation at an inflection point. We are seeing the introduction of new functions, and since we have been able to qualify our tools again as tool of reference for those applications, this will add to the overall growth story. In summary, and you can read it out, we see a structural driver coming from AI that is also impacting the mainstream business across a broad range of end markets, I think that's very important, and also impacting various Besi products. We see that this increased die attach intensity is a multiplier on equipment demand, as I have pointed out for transceivers, but also for 2.5D structures. Because of all that, we see our addressable market growing by a factor of two until 2030, which is an up compared to what we had in our models last year of about 10%. We are very well-positioned in those highly growing markets like 2.5D photonics and HAI devices, and our product developments, which we have launched and are getting track now and are helping us to accelerate the market growth and help us hopefully also to increase market share. That brings me to the end of my presentation, and I hand it over to Richard for the summary. Thanks. A lot of information. I hope it didn't surprise you. It's all following crystal clear roadmaps, but the adoption rate always varies. Let me go to the summary. As we shared this morning, an upgrade of our target model, new target EUR 1.1 billion NGen 1, Christoph's part mainly, but also adding die attach and several plating solutions to that. We have Peter's NGen 2 submicron. Submicron up from EUR 0.5 billion-EUR 0.9 billion to EUR 0.6 billion-EUR 1.1 billion. Simply as explained, because of continued adoption in logic, the range because of expected adoption in HBM, that moves the needle either faster to the upper end or in a somewhat one, two years slower trend, but it will move to that upper end, we're convinced. Also other developments, the chiplet architecture. One of the key factors which many of you ask us is, can Besi maintain its leadership position in this submicron world? Because what we haven't said, I think somebody counted, there are over 10 hybrid bonders announced in the market so far. How many, Chris Scanlan, did we add up in total? It's more like 20. Yeah. There are some Chinese as well. There are two questions which arise. Why is everyone developing a hybrid bonder? There's only one clear answer. In the near term, but certainly the long-term future, the direct copper-to-copper way to connect to devices will become the mainstream. That opportunity leads to all investments in these, whatever, 20 hybrid bonders. The question, how can Besi maintain its leadership position? We've explained to you several things. We were there very early, I don't say the first, because Shibaura was also there. We've been very successful so far to understand clearly what it takes and translate that into production tools. At the same time, on the roadmaps of the key customers, early adopters of hybrid bonding. The process knowhow, which we built with Applied Materials' help, over the past nearly decade, seven years in our formal relationship. As Peter Wiedner explained, what we do in Singapore, what we do jointly in Singapore, but also in Radfeld, coming up in the U.S., is second to none, and that gives us a sustained engagement with customers in developing of all kinds of new processes. Whether we have the best bonder is still the challenge. It looks pretty good today, you have to be always sensitive, careful. Is somebody else building a better bonder? Anyway, that's our entrepreneurial lifeblood, which definitely will take us further. That's key to the upgrade in the model. Why did we increase the operating margin? Very simple. If you look at the success of advanced packaging, not only submicron but also the part in NGen 1, is moving to ever more complex devices. If you do your homework right, you have higher margins. That you will see translated in the end into higher operating margins. That's the reason why we inched that up a bit in line with our strong market development in the past couple of years, but certainly at this very moment. That's the new model. If we take all these messages, many have been touched upon already. You see a significant increase, however words you choose, due to AI infrastructure build-out, and that will continue over the next couple of years. You may argue, if you look at this industry in a historic perspective, it's never a straight line. There may be, let's say, periods where the adoption takes some time, building new fabs takes time, building advanced packaging facilities takes time, not only to build, but also to train people. More importantly, end markets always take time. That's also why our nature has always been a bit on the conservative side. If you look at the drivers, they're enormous. We are at the very beginning of a significant upcycle driven by this whole AI change in the world. We're in an excellent position to benefit from that. Second comment is in line. Currently, you can say there's a deficit in capacity. Besi is well-positioned. The new upcycle, as we explained to you, began in H2 of last year. I won't repeat the anecdote of our close to EUR 600 million revenue last year. That has surprised, by the way, everyone in this market. It's very interesting to see that phenomena time and again in this industry. It's conservative in a way, but on the other hand, it's most leading-edge technology you can imagine. The timing of these cycles remains very difficult, we are moving ever more into, let's say, the decision arena as customers, also helped by Applied Materials. Although the big picture is very clear, the immediate demand changes are often, let's say, not according to a clear schedule. Anyway, it's turned H2, and you've seen that in Besi. As we announced our Q1 numbers, the guidance for Q2, Q4 already, that definitely proves that we're in the middle of that. Significant progress achieved, multiple drivers converging. I hope that was a bit more clear this time on what's happening in this hybrid bonding arena, and it's a lot. Where we are in the core process development and in many cases, process of reference, increasing our targets and adjusting our operating model. Although everyone takes for granted that we have gross margins above 60%, many ask, "Why is it only 60? Are your targets high enough?" That's also why we increased the targets. I can share with you if you would know all what goes wrong in our company. There's still a lot to improve, those targets increasing is a very natural way to manage a business. With that, we'd like to conclude what we have prepared to share with you, we would now like to open the audience for some questions, and Peter Wiedner, Christoph Scheiring, and Chris Scanlan, why don't you come forward, take your chair along, and we'll be happy to answer your questions. There we are. All right. Who wants to sit where? Please take a seat. Peter Wiedner in the middle, you're the most important. No, you're the boss. Who has the first question? May I choose? On the front row, please. Thank you, Richard. One question I have is about your capacity. You talked, I think, on one of the slides that you're going to increase your capacity to 35 tools per month, if that is what you're saying. Is that going to be sufficient to supply this demand that you're talking about by 2030, or is there going to be a continuing increase in your capacity in terms of being able to supply the market? My second question is, clearly, now you seem to be closer to volume adoption of hybrid bonding in HBM. In terms of what needs to be still overcome to go from here to high volume manufacturing, is it something that you need to do or is something customers need to do? What are the steps between now and, say, next year or whenever that high volume adoption takes place? Well, two excellent questions. Number one, if you do a quick math, we are now at a level of building 300 bonders per year. Theoretically, if you multiply that by EUR 2.5 million as an average price, and you look at our model, it's close. We also have shared already that the next phase is already prepared. This capacity expansion, we do in steps. This should satisfy the first part of the five-year model, once it takes off much more, we are able to expand with locations already in place. One of the simple comments is Vietnam. We have started with high-precision tooling, and we've also shared by the end of this year, we will build the first bonders in Vietnam. They move out of Malaysia, we simply have more space in Malaysia. It's as easy as that. Don't worry if that accelerates, we are certainly able to address that. And customers, on an ongoing basis, come and test our capabilities because that same question is on their table, and is Besi ready to deliver once that is required. Your second question, what does it take, high volume? We mentioned in one of the slides we are expanding our support footprint in Taiwan. We are also expanding that in Korea. In the U.S., we have expanded it significantly in bringing Intel up to speed, and that requires a service support along a front-end business engagement model. That has taken us some time. We had enormous help from the two big customers who have a certain mainstream volume. That is now in place. The people, different people, training levels. Also, what we mentioned is the spare part infrastructure. That's completely different supporting a front-end fab compared to a high-end assembly facility. In a joint effort, also with Applied Materials, we have the most brilliant benchmark available, that we bring this ever closer to front-end requirements in the market. Good so far. Next question. Behind you. Sorry. Thank you. François-Xavier Bouvignies, UBS. I have two quick questions. The first one is on the roadmap for hybrid bonding. You mentioned the 50 nm, another 25 nm. When are we going to see the 25 nm tool? I don't want to look too greedy, what is a roadmap beyond that? How far can you go in the accuracy for your tool, do you think? Maybe in the 5 - 10 years view, if you have any roadmap, would be great. Secondly, you mentioned as well the accuracy and the throughput improvement that you are delivering despite these improvements. How should we think about the pricing of that? Because if you have a massive units increase throughput plus accuracy on top, I guess it gives you good pricing power here. You mentioned EUR 2.5 million average ISP. How should we think going forward, given the big advantage you provide to the industry? Peter Wiedner. I start with the last question with the pricing, because that's easy to answer. The effort of developing ever more accurate machines, and that might be a bonder or take ASML for EUV and so on, is exponentially increasing on the R&D effort side. The bonders are getting more complex, and the machines are getting more complex, so the price level is definitely going up with each increased step of accuracy. That's without any doubt, and that needs to be considered if you're looking forward. On the accuracy, for sure, the accuracy increase, we'll move on, and we will see, and we will adopt to what our customers are needing. Currently, the customers are telling us that they are targeting, and depending on which customer you're asking, bump pitches of 1 micron, and some say 0.8 microns. It's in the ballpark, a little bit below one micron. That can be addressed with our developments that are currently ongoing, which will be there in time when the market needs it, before the end of this decade. Then, in parallel, we are always watching out what is the next step of the customer. If they say they go down to 0.5 micron, we will simply follow with our roadmap to that. Not everything in our industry can be already predicted years ahead. In any case, as accuracy has always been, and independent of its hybrid bonding or any other bonding step, has always been a very vital and important part of our DNA. We are anyway having our path-finding R&D departments that are working very generically on how to improve accuracy even further in die placement machines. That's what we anyway do independently. We will be prepared whatever comes along. To add to that, in very close cooperation with the key customers, as Peter Wiedner said, the engagement in their roadmap is what it's all about. They regularly test what progress we are making. You must realize that the timing, and we've seen that in the past, is also not very clear to the customers, even the largest customer on this planet. We, as a supplier, have to switch gears unexpectedly faster and sometimes also somewhat later. Anyway, to underline, we are always connected to the most critical roadmap for accuracy in the market, and that's in logic. It's not in HBM. Memory is always a bit less critical, but still very critical. That determines our long-term future. Your question is very important. Thank you. Next. I just had one on the CPU front. You talked about very encouraging to see Intel Clearwater Forest announcements recently, and AMD's obviously adopted hybrid bonding as well. I'm curious about your penetration in the Arm CPUs, the NVIDIA Vera, Axion, Google, and AWS Trainium, and the propensity for them to adopt hybrid bonding as well. I guess the second question was just kind of following up from an earlier question about the level of service and support that you're given. Do you see that your service business could accelerate faster than the group revenues over the next few years, given the intensity is rising? Or do you kind of see it rising with group revenues? Thanks. Chris Scanlan, the first question. I can address the first question. I think for all the Arm CPU suppliers, none of them yet are using hybrid bonding. That's true. Our involvement there is supporting their current processes that they do use, which tends to be CoWoS, for example. Sometimes in the case of, I think the Amazon chip, it's just chip on substrate multi-chip module. In any event, our equipment can support those process steps. The question is, when do they convert to hybrid bonding? I think the good news is that Arm has a design toolkit now to enable that for their customers for both CPUs and GPUs. That was only done, I think, maybe two years ago, and still being designed into, I expect to see that, but I don't know, I can't tell you exactly when. The second question, Peter? That was about the service revenues. Service revenues are definitely accelerating as we speak, simply because of the reason that it's coming back to what Richard Blickman already said, that hybrid is placed in the front-end area of our customers and not like we are used in the back end. In the front end, there is simply a different style of working with, and yeah, it reflects on spare parts, but it also reflects on the service, because in the back end, you normally only are going to the customer if you're asked for a specific service, while in the front end, typically, there is a ongoing presence of the supplier, and that's for sure then covered with service contracts. Yes, definitely the service part is accelerating as we speak, and it is growing along with our engagement in the front-end arena. Next. Thank you. Simon from Barclays. Maybe it's a relatively simple question, but we get a lot of questions from investors on how to think about Engine One. We've seen the nice increase to the guidance for that. How do you think about the mix of Engine One in your target operating model? 50%, say, of the group today is computing, is it even bigger in the future? How do we think about spares and services within that? I think that would be very helpful for investors just to picture how that grows from here, given its implied doubling, I'd say. Second question would just be on photonics. Last year you gave us, I think it was a 60 hybrid bonding unit TAM for photonics. You sound very bullish about it. It's clearly a big opportunity for you guys. How do we think about how you think about that TAM, but also the dynamic between some customers will use flip chip for a while and eventually shift over, and others are already using hybrid bonding today. That would be very helpful as well. Thank you. Christoph Scheiring. Your question about the Engine One split in the driving market. What we see is basically, as described, a strong push coming from the AI, which is going to compute 2.5D cores as a main driver right now. The photonics portion is seeing an increase, which will reflect in higher shares of photonic business for overall Engine One. At this moment, already very relevant, but expected to increase over time in the next years. That is a bit on the expense of mobile, which has been very large in the last up cycles and is still relevant. As I explained, with AI-enabled phones kicking in again, seeing kind of a revival, but not at the level we have seen it and we expect the transceiver business to be. Both transceivers and 2.5D compute will be the major contributors going forward. If you translate that to product lines, it is flip chip for the compute and EVO mainly for the transceiver business. Hi, Martin Jungfleisch from BNP Paribas. The first question is really on China. I think you have talked much about it. How much of an opportunity do you see there, and is that included in your TAM? The hybrid bonding TAM, does it include the bond that are potentially going to China? That is the first question. The second one really is if you could split up the TAM for hybrid bonding for the high and low end. I think last year you gave us these individual market groups by HBM, AI logic, et cetera. Just is it fair to assume that the majority of the increase would come from AI logic part of it today? Thank you. Let me answer that question. Your first question about China. Yes, we are considering China as we are selling to China today, so it's also considered in our TAM. The second one is the main portion actually, from today's model that I have been presenting, the increase is coming really from the CPO section, actually. It's for sure the AI logic section, as I said, and also the computing logic section is confirmed. Once again, that section was the first one to be manufactured in the world, so that was the D segment, which was the, also years back, the easiest one to predict. That has always been there and has always been refined year- on- year. That's not the segment which kind of is giving a bit the big surprise. We know that segment best. Really the CPO, as I said, which was really skyrocketing within one year from R&D to real manufacturing and now has a tremendous outlook, which is definitely supported if you dig deeper and look into what is happening in the data centers and how copper interconnects are being replaced by fiber interconnects for the pure reason of speed and especially less power needs for fiber interconnect. You can also translate that to the end customer needs. It's clearly the CPO, which is the driving factor. Next. Hi. Martin Marandon-Carlhian from ODDO BHF. My first question is on hybrid bonding competition. I'm trying to understand how much of an edge you have versus competition, notably with the new 50 nm accuracy tool. Maybe what could be helpful is that maybe giving an example of current products, which would be based on 50 nm accuracy, hybrid bonding tools, where maybe you are alone in the qualification process, if that's relevant. The second question is on memory. I think I saw a slide where you talked about HBM5 and the fact that it will be in the majority hybrid bonding. I'm just trying to understand there, if you talk about the majority of chips, we have hybrid bonding in them, or you also are talking about the hybrid bonding assembly market being larger than TCB for HBM5. Well, let me answer the first part, and Peter, you the second part. On the competition, key is, of course, to find the mainstream adopters. In that mainstream, any production of any good in the world looks for a process window, reliability of that window, and then the outcome is the yield. That is ultimately where you can achieve a volume sale, which then, if you do it right, brings you margins, and you can pay your R&D cost and your support. The focus on mainstream application is where it's all about. If you look at the competitive landscape, certainly, the highest volume is expected in memory. That's also not difficult. In a rule of sum, there's a relationship, one to four or one to six, between logic and memory in a very simplistic way. Most competitors are looking at that part of the market. You also heard earlier that the accuracy requirement for memory is a bit less than the accuracy required for logic because you have more IOs, which are denser designed. If you look at that whole landscape, and we look at it every single day, you also try to understand which solution is best suitable along those criteria in the next generation, because it's always about the next generation. Today, we have this 100 nm as more or less an industry standard. As said, 100 nm is now enough for logic and also for memory stacking, and that's fantastic because you can make that platform ever better. You can improve the accuracy, you can improve the speed, you can improve the reliability, and for that reason, the yield. That's in full swing every single day. You can bet your life customers are beating us up that that should be better and measured. We have these calls where I'm also involved in following the progress. As long as that's happening, it's difficult for competition to get in. Competition will get in with the next round. The next round, 50 nm on the logic. We have several prototypes now running, one focused on the accuracy, the other one focused on the speed. That platform, as Peter Wiedner explained, you can use with slightly less accuracy, but then the expectation and already data shows that you can increase the speed because the machine is far more stable. That improves the cost of ownership. Also along those, why am I explaining this? Customers are always looking, is somebody else having a better product? That's the open, competitive world. In these different applications with different requirements, you are carefully understanding through customers, but also through other contexts, what's happening in this world. If you ask me, what is your competitive lead, timing? That's always difficult to answer. You can assume today that that is a very decent lead. Will that last through the five years? Well, on the high end, it's pretty, let's say, safe to expect that there's not immediately a 50 nm tool available that can be a revolution. On the more lower, let's say, accuracies, and that's where competitors are aiming, you may have in five years a segment of the market which is less accurate, but also immediately, the margins will be far less attractive. Then the discussion, as always, where should you put your best assets? Your people should focus always on the next generation, and that's our strategy DNA, not to defend a market which is in a lower application, offering lower margins. In a bit of a longer answer, that's the way we are looking strategically and every week in our teams at what is happening in this market. Chris Scanlan, from a technology roadmap angle Peter Wiedner and all the support people from very much how are we doing today, also with the help of Applied, who have a much deeper, let's say, position in this overall market. You try to gain as much intelligence every single day. Anyway, just to share with you how we look at that. Peter Wiedner, next part. Yes. If I understood your second question correctly, it was about HBM5 and what we are thinking about hybrid demand versus TCP demand. Yeah. As I said during my presentation, with every sequential generation, we are expecting higher hybrid needs simply in order to achieve the specifications of these new generations. If you also look at the forecast chart that I have been showing, is when you look at the years where HBM5 is showing up, you can see that in the total market, the growth only is then coming from the, that's normal, from the newest generation anymore. If you then say, well, more than 50%, definitely and far more than 50% will be hybrid, that means from a machine market perspective going forward, that will be mainly a hybrid market versus a TCP market. That's different than today, because today all the growth rate, the nice growth rates that HBM has experienced in the last two years and for three years, well, as TCP was or still is the standard, that was for sure all on TCP bonders. That will drastically change then with the generations to come. That's what we are thinking about, how that will develop. Thanks. Marc, ING. Two questions. First, wafer-to-wafer hybrid bonding. I think we discussed it in the past, there were clear technological reasons why wafer-to-wafer would be less attractive for the long run. I think Peter Wiedner had discussed it already a bit. I think ASML was quite vocal at the last imec event, that they are going into that direction. Is there something that really changed there in the discussion with the clients? Do you think there's some reasons why wafer-to-wafer could be a bit more of a viable alternative to die-to-die or die-to-wafer? Chris Scanlan. Yeah, I can take that one. There's definitely applications where wafer-to-wafer bonding makes a lot more sense and is more useful. One good example of that is CBA DRAM, which is an emerging memory technology that requires the bonding of different portions of the DRAM device using wafer-to-wafer bonding, that's expected to be a very high volume application. That's not an application where, at least today, where we see Die-to-Wafer bonding making sense because of the fact that you simply can't test and evaluate the goodness of either side of that sandwich before bonding. They're anyway both the same size, so it's a perfect application for wafer-to-wafer bonding. There's also other applications like image sensors that have been using it for a long time, for similar reasons, same die size, difficult to evaluate the quality before bonding. Those are the cases where wafer-to-wafer makes the most sense in my opinion. There are high volume applications for those use cases. What it cannot address is use cases where you have, let's say, multiple smaller die being bonded onto a larger one, which is most of the logic and memory combination kind of applications that we shared with you. That's where we don't see a threat coming from wafer-to-wafer bonding. Yeah. Thanks. A second question is, I think in the introduction you said you only talk about confirmed clients. I think there's quite a bit of talk about Terafab. Some of your competitors said, "Okay, yeah, we take it seriously." Is there anything that you can say about this? Is there any discussion you already had, or is it indeed potentially a large opportunity for you, or how do you look at it? Peter Wiedner. It definitely is also for us a large opportunity, the Terafab. We have started discussing with the team, which is setting up the Terafab in the United States. They have confirmed that this will not only be a front-end facility, but also packaging will be included. Yes, out of that's a business opportunity. As it's a Terafab, obviously a very big one. Yeah. Every chip needs to be assembled one way or the other. That is directly to confirm what Peter Wiedner said. The good thing is, again, with our Applied relationship, we are engaged from the very beginning, same with Rapidus in Japan, same with new fabs being built in the U.S. Just to confirm that we are very much engaged in that is an understatement. Next. Yes. Ruben Devos from Kepler Cheuvreux. I just wanted to have another question on HBM. I think you've now mentioned being NVIDIA Feynman and CPO being included in your low case. HBM is still in the mid-case. That means you've built a very convincing case, I'd say, why it could be adopted, but you haven't done it in the low case. I guess there's maybe some hurdles yet that you're not entirely confident about. I think just in general, apart from the fact that the process costs have to come down, you don't have all of these parameters under your own control. Probably also your partners or your customers are having some of that, having an impact there. What could really unlock adoption, I guess? Well, that's an interesting question, actually, you're totally right with that question. If you had seen us preparing the presentation, it would make it clear because we were discussing, not on that specific question, but in general, to shape the graph this time totally different, to give a different kind of transparency. It's really, in these days, as you are pointing out rightfully, not necessarily only more a low and a high case and something in between. In the end, we already had it all different, in the end, we said, well, the audience here is so used to this also used to, okay, in a nutshell, you have the logic in the low case the memory the rest in the high case, that we said, "In the end, let's simply keep it, not because we are not convinced it's not coming, simply in order to not confuse the history, we are consistent with the charts." That's the reason why we just kept it like that. It's interesting that you're asking that perhaps we should have still gone to changing the whole graph and showing it differently. Yeah. I guess we could probably apply a bit the same reasoning for the fact that you now have included NVIDIA Feynman, right, in the low case. You talked about CPO being a significant contributor to your uplift. I guess last year you talked about sort of 500 units that you expect to sell in AI logic. You didn't repeat those targets anymore, is that also a bit what we should think about it? You're very conservative still there, or? No, actually, what you should consider is that also in the older forecasts, the last year or the year before, as I think I said already in one of the other, we did not only consider in these forecasts, let's say the companies that already had hybrid manufacturing. Otherwise, it would have in the beginning only an AMD forecast and that's it. We have from the beginning considered that, yeah, also this customer will change. Also this customer will change, one earlier, one later. Also from that angle, we had factored in a certain portion of NVIDIA, for example, because you're asking Feynman specifically, already in our previous forecast. For sure, we have now refined the numbers and timelines and so on according to the information, it's not that this is coming on top totally. With having that said, as a generic explanation, I can say that, yeah, also the logic part in our forecast was increased a little bit with this positive development. But there, I have to say, also when I did the update, let's say our view from last year was already pretty solid. That's the reason why there was not so much change in that section, simply because we had the best visibility anyway there. The big portion of the change is really coming from the CPO section. Yeah. Hi, Samer Jada with Galileo Value Investors. I had a question on edge AI. We saw NVIDIA introduce large models being put on device. Apple, similarly, with the smartphone, is going to have some on-device models. Given the capability increase on models and the need for lower inference costs, latency improvements, all that stuff, do you see an update in terms of your long-term penetration of smartphones and just edge AI devices in general of hybrid bonding? Chris. You want it? Peter. Along these lines, I would see two things. Number one, there is definitely— today we know it's all done, yeah, not on the edge device. It's just passed through and done in the data center. Still we are seeing activities in the smartphone section to make the processors more powerful. For that reason, we know some, let's say, projects where they are trying to incorporate or planning to incorporate hybrid bonding for these application processors. I see the biggest drive for that coming out of China, by the way, as on a side note. The other thing which is going along the line and which is very interesting lately is that what we have not seen last year, for example, the year before, is compute power on an edge device, that's on car processors for automotive, for cars. There we are seeing currently a trend starting, I would say, that really they want to make the processors in the car way more powerful in order to utilize AI. But there, as we all know, because of latency, you cannot rely on a data center to get a data back, because a self-driving car has to react immediately. So lately we are seeing something in that arena, which is then not handheld device, but which is still edge AI, but in that case, automotive edge AI. Not sure if there is something to add from your side, Chris Scanlan? I would just add, I think, outside of the engine two hybrid bonding side of the business, I think in the engine one side of the business, it is having or presenting opportunities like I mentioned in my presentation. What it means is higher processing power on the AP, means higher heat dissipation, and the need for a lot more memory capacity, LPDDR next to the processor. That's actually driving different kinds of packaging, which I mentioned. There's opportunities in chip-to-wafer die attach using mastery flow flip chip. There's opportunities in high precision placement for memory stacking, which is something new in the memory market where Besi can participate, where before we couldn't, and even in things like molding. We do definitely see some relevant changes there that present opportunities. Yeah. Let me add one more. You mentioned APs, processors, you mentioned memory, what you have not yet mentioned these sensors, many of those new emerging AI devices come with more sensing functionality in order to sense your surrounding environment and give you context-based feedback. We also see quite a lot going on on the sensor side, which is, again, very much supporting parts of the mainstream business, because we have strong position with many of the sensor suppliers. Thanks. Michael from Graaf Beheer. First one is about data centers. If somebody designs a data center fully loaded with photonics and co-packaged optics, how many more bonding steps are there needed compared to one with copper connections? Is that factor 2 or 3? We've heard numbers from NVIDIA speakers at conferences talking about like 1 million CPO connections in a data center. We haven't really, at least I haven't done the math on the ratio of total bonds, and all the other packages and other components in the data center versus that. It's a pretty big number. It is much more intensive, possibly. Yeah, definitely. I showed you the network switch, the Spectrum-X switch, the switch itself, the processor has seven individual chiplets I didn't talk about, but that's already a chiplet package. There's seven bonding steps there, +1 to attach that to the substrate, that's eight. There's 36 hybrid bonded chiplets around that. It adds the hybrid bonding steps inside the chiplet plus a flip chip or TCB step onto the substrate. That's a big multiplier on that particular component. When you talk about GPUs, it's going to be a very similar story. Not as many per GPU, but now you have a GPU and an associated switch for every GPU. Maybe we'll do that math and present it next year. Next year. Okay. Are data centers also being retrofitted with photonics and co-packaged optics, or is that only going to happen in seven years when the first AI centers will be burned out? I think it's very difficult to retrofit. Yeah. Very difficult. Okay, good. Second question is a follow-up question on services. The annual report always provides segmentation between equipment sales and services sales. I noticed that services have been flattish over the past five years, even though you sold more than EUR 2 billion of equipment to your customers, which must have boosted their installed base. Typically, when your installed base goes up, your services sales also go up, but it didn't happen. I was wondering what has been happening. Well, number one, or to answer that, you need to see the timing. If you sell a machine, you are first having a warranty period, only after warranty period, you sell the service. Sometimes customers are even in advance buying, let's say, instead of the usual 12 months, 24 months with an increased machine price already. As I said on the other answer before, the service increase is mainly coming from my business unit, because that's more than front-end related. The huge numbers of sales, and if you go now back one year, two years, my numbers were, relatively speaking to Christoph's numbers, still the way smaller ones. We are only starting now with the service contracts because of the service of their warranty period. Now as the numbers are increasing and increasing, always with the delay of the warranty period, you will see that climbing up. What you see or what you are observing here is more or less the introduction phase, which has a certain delay relative to warranty. Okay. Again, it's about a five-year period, that seems to be that the delay will eventually kick in. Five years back, we didn't sell hundreds of hybrid bonders. We did sell hybrid bonders, but they were very limited and in number back then, because it was only starting, you cannot expect a big number out of that. No, I mean, I'm talking about total services. Normal flip chip bonders, you don't sell service contracts with that. Okay. Clear. That's a classic back-end equipment, and you install it, and that's it. Okay. Clear. Thank you. Next question, Nigel. Thank you. Thanks. Right. Question on China. I think most of the slides, very detailed by the way, thank you for that, have been on end markets. Can you discuss how you are addressing what I believe to be strong growth and push in terms of advanced packaging in China? Seems you have a very good market positioning. I think, Christoph, you've mentioned as a demand driver or pillar, you said, but how do you see this in the next couple of years, both from a competitive perspective, but also in terms of growth rate across, I guess, 2.5D, photonics, consumer, et cetera? As you rightfully said, China is important for us, remains important for us, especially for the mainstream product portfolio. We see basically very similar developments as in all the other countries. We see photonics being very strong there. We see not directly CoWoS, but CoWoS-like packages, which are, from a bonding perspective, very similar to the TSMC application. We respond to that demand by having our own facility there. With Leshan manufacturing, China for China there. Not only manufacturing, but also having a dedicated supply chain for the Chinese market. What we see is that the competitive intensity there is very high, and that has not so much to do with our typical competitors, but more with local Chinese competitors, also driven largely by government funds and government policies to introduce local sources whenever possible. That's kind of a limiting factor for us. However, so far with our advanced technologies, we have been able to escape those competing fields and find our sweet spots where we can offer technology that's simply not available in China and gives basically really a lead in supplying equipments into those fields. As said, transceivers is one of those fields. Honestly, we have seen a trend that some of the lower-end processes were moving over to Chinese competitors. This is anyway then a business we are not interested in as it is very price sensitive, and margins we can achieve there are not as expected. We focus on the high-end part of the business as always. That's how we look at China. You have to be careful. We don't develop anything there. All the core developments are driven out of the European headquarters. We have engineering in Singapore. We have in China, basically the application team that is bringing the machines to the customer, but not exposing ourself to the IP risk and helping our competitors to get up to speed. Thank you. Actually, I had a question on exactly that, but more on Peter's side. You have been shipping hybrid bonders to China. I was wondering, well, two things. First off, aren't you afraid that those are copied by local competitors? Also, if not, you said that it's part of your TAM, is there a point maybe in a few years where these tools I can imagine are shipped for R&D purposes today inflect in terms of volume applications? If you don't want to, I will answer it happily. Well, to add to Christoph's part first, you have to also understand which customers do we support, and there are basically three types of customers in China. We went to China to support non-Chinese customers setting up their operations in China. In the very early days, it was Motorola, then TI, and Intel, and the whole supply chain for high-end smartphones. That's one part. At the same time, using Chinese subcontractors, and many customers of ours, European customers, have built capacities at, and there are four typical ones who have capacities established for non-Chinese customers. Then you have the third part, Chinese customers. For many years, that was more, let's say, the middle and the lower end, but recently, as explained, the 2.5D modules, CoWoS-like, using our flip chip, also driven by their end customer. Their end customer who builds those modules with Chinese suppliers dictate which equipment to use. Our strategy for China, and that brings me also to the hybrid cam, is driven by end customers, and is driven, of course, by margin, not by market share. In order to protect ourselves in current situation already, but in the future, that may well be more stringent, that we have less U.S. components in our machines. We have them all very carefully analyzed not to make any mistakes, and that may well, in the end, bring that part of the business in line with what's happening in geopolitics to whatever lower levels. The world demand is the world demand. That will then be manufactured outside of China. You see an enormous increase in the countries around China. In Vietnam, for instance, more than in Philippines. Thailand is up and coming. For the more mid and lower-end, India. Simply follow the customers, and those customers are simply evaluating day by day what is the best tool of reference. Is that a Besi tool or somebody else? That's, in a nutshell, how we organize our business. Does that answer your question, Nigel? Yeah. Thank you. Any next question? Have we answered all the question, Gambi? Yes. Finally. Hi, Richard. Actually, following on to that question, you've seen in the press about the new Chinese scaling, which is not Moore's law-based, but based on some folding structures, and that would probably include hybrid bonding. Has there been any discussion with governments on this? The risk remains that there will be further risk. You don't have restrictions on hybrid bonding into China at this point. Whether there will be restrictions given how the industry there is trying to overcome their lack of access to EUV, et cetera. Secondly, there has been speculation in the press in the last few months about Besi being acquired. Any thoughts? Besi is a big company in its own right now, as such, really. Does it really need a partner like that? Well, let me first answer, this wonderful development, Tau. Maybe Chris Scanlan, that's for you. Better answer on this stacking. Yeah. You're the technology man. From what we know about this Tau scaling, first of all, what you're referring to is, because the access to advanced lithography is not there, one solution to that is to simply use more silicon area and so-called folding the circuit on top of each other. Effectively, the same argument that we use for all the other hybrid bonding use cases, right? Our understanding is that at least the first implementation that they're trying to accomplish there is using wafer-to-wafer bonding, so that they don't test anything beforehand. They just sandwich it together and then test it later. We'll see how it develops. They very well could adopt die-to-wafer hybrid bonding for that use case as well. We don't really, at least I don't see that as being fundamentally different than other kinds of logic-to-logic hybrid bonding use cases. The second question, we simply refer to two press releases in the last two years when those rumors arise, I hope we convince you a little bit today, we have great confidence in our own strategy, we have a wonderful opportunity to execute on that strategy, rumors we don't respond to. Also the partnerships, we highlighted that today in several comments with Applied Materials, is very important for us. Partnerships in this industry are becoming ever more, also for the simple reason that due to geopolitics, the M&A situation is what it is, nonexistent nearly. Partnerships is the way to go. That's what it is. I see six zeros in front of me. We've run out of time. I hope we answered all your imminent questions. If you have more questions, don't hesitate. Thank you all for coming, those participating online also, thank you very much. That's then it for today. Thank you.