Thanks. Welcome to the Aehr Test Systems fiscal 2026 first quarter financial results conference call. At this time, all participants are in a listen-only mode. A question and answer session will follow the formal presentation. If anyone should require operator assistance during the conference, please press star zero on your telephone keypad. Please note this conference is being recorded. I will now turn the conference over to your host, Jim Byers of Pondell Wilkinson Investor Relations. You may begin. Thank you, Operator. Good afternoon. Welcome to Aehr Test Systems' first quarter fiscal 2026 financial results conference call. With me on today's call are Aehr Test Systems' President and Chief Executive Officer, Gayn Erickson, and Chief Financial Officer, Chris Siu. Before I turn the call over to Gayn and Chris, I'd like to cover a few quick items. This afternoon, right after market close, Aehr Test issued a press release announcing its first quarter fiscal 2026 results. That release is available on the company's website at aehr.com. This call is being broadcast live over the internet for all interested parties, and the webcast will be archived on the Investor Relations page of Aehr Test's website. I'd like to remind everyone that on today's call, management will be making forward-looking statements that are based on current information and estimates and are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements. These factors are discussed in the company's most recent periodic and current reports filed with the SEC and are only valid as of this date. Aehr Test Systems undertakes no obligation to update the forward-looking statements. With that said, I'd like to turn the conference call over to Gayn Erickson, President and CEO. Thanks, Jim. Good afternoon, everyone, and welcome to our first quarter fiscal 2026 earnings conference call. I'll begin with an update on the exciting markets Aehr Test Systems is targeting for semiconductor test and burn-in, with an emphasis on how these markets seem to share a common thread of market growth related to the massive expansion of data center infrastructure and AI. After that, Chris will provide a detailed review of our financial performance, and finally, we'll open up the floor for your questions. Although we started with the typical low first quarter revenue, consistent with the last few years and actually higher on both top and bottom lines in Wall Street analyst consensus, we're pleased with our start to this fiscal year. We had revenue from several market segments and strong momentum in sales and customer engagement, both wafer-level and packaged part test and burn-in of artificial intelligence or AI processors. Although we did not provide guidance for the quarter, our first quarter results surpassed analyst consensus estimates for both the top and bottom lines. We saw continued momentum in the qualification and production burn-in of packaged parts for AI processors, which is fueling sales growth in our new Sonoma ultra-high-power packaged part burn-in systems and consumables. During the quarter, our lead production customer, a leading hyperscaler, placed multiple follow-on volume production orders for Sonoma systems, requesting shorter lead times to support higher than expected volumes as they accelerate the development of their own advanced AI processors. This customer is one of the premier large-scale data center providers and has already outlined plans to expand capacity for this device and introduce new AI processors over the coming year to be tested and burned in on our Sonoma platform at one of the world's leading test houses. We're also collaborating with them on future generations of processors to ensure we can meet their long-term production needs for both packaged and even wafer-level burn-in. Hyperscalers like Microsoft, Amazon, Google, and Meta are increasingly designing and deploying their own application-specific integrated circuits, or ASICs, for AI processing to meet the unique demands of their massive scale workloads and gain a competitive advantage. Aehr allows customers to perform production burn-in screening, qualification, and reliability testing for GPUs, AI processors, CPUs, and network processors directly in packaged form. Our Sonoma Systems provide what we believe to be the industry's most cost-effective solution, enabling customers to smoothly move from early reliability testing to full production burn-in and early-life failure screening, which helps reduce costs, improve quality, and speed up time to market. In the last year, Aehr has implemented several enhancements to the Sonoma System to meet qualification and production test and burn-in requirements across a wide range of AI processor suppliers, test labs, and outsourced assembly and test houses, or OSATs. Major upgrades include increasing power per device to 2,000 watts, boosting parallelism, and adding full automation with a new fully integrated packaged device handler. Over the last quarter, including a very successful customer open house we held last week at our Fremont, California, headquarters, 10 different companies visited Aehr to see our next-generation Sonoma System and new features, including a fully automated device handler for completely hands-free operation, which we've installed here at our Fremont facility. Customer feedback regarding these enhancements has been very positive, and we expect these new features to open up new applications and generate additional orders this fiscal year. As I've mentioned before, one of the biggest benefits of our acquisition of InCal Technology one year ago is that it gives us a front-row seat to the future needs of many top AI processor customers, providing us with close insight into their burn-in requirements. As the only company worldwide that offers both proven wafer-level and packaged part burn-in systems for qualification and production burn-in of AI processors, Aehr is ideally positioned to assist them regardless of their burn-in method. Consequently, we're experiencing increased interest in our Sonoma high-volume production solution for packaged-level burn-in, and some of these same customers, as well as other AI processor companies, are approaching us to learn about our production wafer-level burn-in capabilities. This past year, we delivered the world's first production wafer-level burn-in systems for AI processors. Importantly, these systems are installed at one of the largest OSATs worldwide, providing a highly visible showcase to other potential AI customers of our proven solution for high-volume testing and burn-in of AI processors in wafer form, thereby strengthening our market position. We anticipate follow-on orders from this innovative AI customer as volumes increase, and other AI processor suppliers have already approached us about the feasibility of wafer-level burn-in of their devices. We're also developing a strategic partnership with this world-leading OSAT to provide advanced wafer-level test and burn-in solutions for high-performance computing and AI processors. This joint solution, already in operation at the facility, marks a significant milestone for the industry. By combining Aehr Test Systems' technological leadership with this OSAT's global reach, we can provide unique capabilities to the market. This model offers a complete turnkey solution from design to high-volume production, and several customers have already begun discussions to learn more about our high-volume wafer-level test and burn-in solutions for AI processors. This OSAT and Aehr have a long history of innovation together, including the first FoxXP wafer-level burn-in system installed in an OSAT for high-power silicon photonics wafers. Now, the world's first wafer-level test and burn-in of HPC AI products using Aehr FoxXP systems, and they're also one of the largest installed bases of Aehr Sonoma system for high-power AI and high-performance computing processors. Additionally, this last quarter, we launched an evaluation program with a top-tier AI processor supplier for production wafer-level test and burn-in for one of their high-volume processors. This paid evaluation, which includes a custom high-power wafer pack and the development of a production wafer-level burn-in test program, will feature a comprehensive characterization and correlation plan to validate Aehr Test Systems' FoxXP production systems for wafer-level burn-in and functional testing of one of this supplier's high-performance, high-power processors on 300-millimeter wafers. We believe this represents a significant step toward adopting wafer-level burn-in as an alternative to later-stage burn-in and into future generations of their products. Our FoxXP multi-wafer test and burn-in system is the only production-proven solution for full wafer-level test and burn-in of high-power devices such as AI processors, silicon carbide, and gallium nitride power semiconductors, and silicon photonics integrated circuits. Beyond AI processors, we're seeing signs of increasing demand in other segments we serve, including silicon photonics, hard disk drives, gallium nitride, and silicon carbide semiconductors. We're experiencing ongoing growth in the silicon photonics market, driven by the adoption of optical chip-to-chip communication and optical network switching. This quarter, we upgraded another one of our major silicon photonics customers' FoxXP systems to the new higher-power configuration, doubling their device test parallelism with up to 3.5 kilowatts of power per wafer in a nine-wafer configuration. This latest system shipment includes our fully integrated and automated wafer pack aligner, configured for single touchdown test and burn-in of all devices on their 300-millimeter wafers. We anticipate additional orders and shipments this fiscal year to support their production capacity needs for their optical I/O silicon photonics integrated circuits. In hard disk drives, AI-driven applications are generating unprecedented amounts of data, creating ever-increasing demand for data storage and driving new read/write technologies for higher density drives, particularly for data center applications. We're ramping and have shipped multiple FoxXP wafer-level test and burn-in systems integrated with the high-power wafer probe and unique wafer pack high-power contactors to a world-leading supplier of hard disk drives to meet the test, burn-in, and stabilization needs of a new device used in their next-generation read/write heads. This customer is one of the top suppliers of hard disk drives worldwide and has indicated they're planning additional purchases in the near term as this product line grows. Gallium nitride devices are increasingly used for data center power efficiency, solar energy, automotive systems, and electrical infrastructure. Gallium nitride offers a much broader application range than silicon carbide and is set for significant growth in the next decade. Our lead production customer is a leading automotive semiconductor supplier and a key player in the GaN power semiconductor market, and we have multiple new engagements with other potential GaN customers in progress. We're currently in design and development of a large number of wafer packs for new device designs targeted for high-volume manufacturing on our FoxXP systems. Although silicon carbide growth is expected to be weighted toward the second half of the year, we continue to see opportunities for upgrades, wafer packs, and capacity expansion as that market recovers. Demand for silicon carbide remains heavily driven by battery electric vehicles, but silicon carbide devices are also gaining traction in other markets, including power infrastructure, solar, and various industrial applications. Late in last fiscal year, we shipped our first 18-wafer high-voltage FoxXP system, extending beyond our previous nine-wafer capability to test and burn-in 100% of the EV inverter devices on six or eight-inch wafers in a single pass with up to plus or minus 2,000 volt test and stress conditions at high temperature. We believe we're well positioned in this market with a large customer base and industry-leading solutions for wafer-level burn-in. I also want to give a quick update on the flash memory wafer-level burn-in benchmark we've discussed earlier. This benchmark is ongoing, and we've now begun testing with our new fine-pitch wafer pack that can meet the finer pitches and higher pin count costs more cost-effectively for flash memory, but also can be applicable for DRAM and even AI processors if they require fine-pitch wafer probing. This is the first wafer pack full-wafer contactor demonstrating this capability. The benchmark has gone slower than expected, with some challenges with the test system bring-up, but appears to show positive results of the new wafer pack, our ability to do an 18-wafer test cell, and using our full automated wafer handler and wafer pack aligner for the 300-millimeter NAND flash wafers. Interestingly, the market for NAND flash is in a state of flux, with earlier announced transition to hybrid bonding technologies for higher-density NAND flash on 300-millimeter wafers, driving new requirements for higher parallelism and higher power, to now a push for high-bandwidth flash, or HBF, which drives very different requirements in terms of test system capabilities. This is exciting news for Aehr, as both are driving power requirements up substantially, which is right in our wheelhouse. High-bandwidth flash, or HBF, is an emerging technology developed by two of the flash market leaders and aims to provide a massive capacity memory tier for AI workloads by combining the DRAM high-bandwidth memory, or HBM-like packaging, with 3D NAND flash. This innovation is said to offer 8 to 16 times the capacity of HBM DRAM at a similar cost, delivering comparable bandwidth to dramatically accelerate AI inference and process larger models more efficiently while using less power than traditional DRAM. We're working with one of these lead customers on the now newer tester requirements to provide them with a proposal to meet even these newer, higher performance, and higher power requirements within our FoxXP wafer 18-wafer test and burn-in system infrastructure. We expect to have yet another update out at next quarter's earnings call. The rapid advancement of generative artificial intelligence and the accelerating electrification of transportation and global infrastructure represent two of the most significant macro trends impacting the semiconductor industry today. These transformative forces are driving enormous growth in semiconductor demand, while fundamentally increasing the performance, reliability, safety, and security requirements of these devices across computing and data infrastructure, telecommunications networks, hard disk drive and solid-state storage solutions, electric vehicles, charging systems, and renewable energy generation. As these applications operate at ever higher power levels and in increasingly mission-critical environments, the need for comprehensive test and burn-in has become more essential than ever. Semiconductor manufacturers are turning to advanced wafer-level and packaged-level burn-in systems to screen for early-life failures, validate long-term reliability, and ensure consistent performance under extreme electrical and thermal stress. This growing emphasis on reliability testing reflects a fundamental shift in the industry, from simply achieving functionality to guaranteeing dependable operation throughout a product's lifetime, a requirement that continues to expand alongside the scale and complexity of next-generation semiconductor devices. To conclude, we're excited about the year ahead and believe nearly all of our serve markets will see order growth in the fiscal year, with silicon carbide growth expected to strengthen further into fiscal 2027. Although we remain cautious due to ongoing tariff-related uncertainty and are not yet reinstating formal guidance, we're confident in the broad-based growth opportunities ahead across AI and our other markets. With that, let me turn it over to Chris, and then we'll open up the lines for questions. Thank you, Gayn, and good afternoon, everyone. Looking at our Q1 performance, results exceeded analysts' expectations for both revenue and profit. First quarter revenue was $11 million, a $2.1 million decrease from $13.1 million in the same period last year. It is important to note that last year Q1 benefited from a very strong consumables revenue quarter, which makes direct comparisons challenging. This quarter's revenue was primarily driven by demand for our FoxXP and FoxCP products. In Q1, we shipped multiple FoxCP single-wafer production test and burn-in systems, featuring an integrated high-power wafer probe for new high-volume application involving burn-in and stabilization of new devices for our lead customer in the hard disk drive industry. Contactor revenues, which include wafer packs for wafer-level burn-in business and BIMs and BIPs for our packaged part burn-in business, totaled $2.6 million and made up 24% of our total revenue in the first quarter, significantly lower than $12.1 million or 92% of the previous year's first quarter revenue. As we have discussed in the past, this consumables business is ongoing even when customers are not purchasing capital equipment for expansion. We feel that this revenue will continue to grow both in terms of absolute value, but also as a percentage of our overall revenue over time. Non-GAAP gross margin for the first quarter was 37.5%, down from 54.7% year-over-year. The decline in non-GAAP gross margin was mainly due to lower sales volume and a less favorable product mix compared to the previous year, which included a higher volume of higher margin wafer packs. Also, our products shipped this quarter included lower margin probers and an automated aligner, both manufactured by third parties and sold as part of our overall product offerings. Non-GAAP operating expenses in the first quarter were $5.9 million, an 8% increase from $5.5 million in Q1 last year. Our operating expenses increased due to high boosts in development expenses for our ongoing project, as we continue to improve sources and support AI in the initiative and the memory project. As we previously announced, we successfully closed the InCal facility on May 30, 2023, and completed the consolidation of personnel and manufacturing into our Fremont, California facility at the end of fiscal 2023. In connection with the facility consolidation, we eliminated a small number of headcount due to redundancy in our global supply chain and incurred a one-time restructuring charge of $219,000 in our fiscal first quarter. In the first fiscal quarter of 2026, we received $1.3 million of employee retention credit from the IRS for eligible businesses affected by the COVID-19 pandemic. We will call this cash credit minus the professional fee to process the refund and other income on our income statement. In Q1, we recorded an income tax benefit of $0.8 million, and our effective tax rate was 0.875%. The non-GAAP net income for the first quarter, which includes the impact of stock-based compensation, and the first and related assessment and retention charges, was $0.3 million or $0.01 per share, compared to $2.2 million or $0.07 per share for the first quarter of fiscal 2025. The consensus net income for fiscal 2026 was even. Our backlog at the end of Q1 was $15.5 million, with $2 million net bookings received in the first five weeks of the second quarter of fiscal 2026. Our year-to-date backlog now totals $17.5 million. Turning to our cash flows and balance sheet, during the first quarter, we used $0.3 million in operating cash flows, ended with $24.7 million cash, cash equivalents, and restricted cash, compared to $26.5 million at the end of Q4, mainly due to the final $1.4 million payment for facility renovation. In total, we have spent $6.3 million on remodeling our manufacturing facility. With the renovation now complete, we have significantly upgraded our manufacturing floor, customer and application test labs, and clean room space for wafer pack full-wafer contactors. Improvements have increased our power and water cooling capacity, enabling us to manufacture all our Fox wafer-level burn-in products and packaged part burn-in products, including Sonoma, towel, and medical products, on a single floor. We are very excited about this renovation, as it was specifically designed to enable us to manufacture more high-power systems for AI configuration. We believe investment in this facility renovation has increased our overall manufacturing capacity by at least five times, depending on the current cloud configuration, and we are more ready than ever to support the growth of our customers. We celebrated these upgrades with a customer open house that was well attended and received very positive support. Over the past quarter, we hosted many packaged part and wafer-level burn-in customers who had the opportunity to see our expanded capabilities firsthand. Importantly, we do not expect and anticipate additional capital expenditures for facility expansion in the near future. We have no debt and continue to invest our excess cash in money market funds. As Gayn mentioned, we started the year by withholding formal guidance due to ongoing tariff-related uncertainty. Since we remain cautious, we will continue with that approach for now. However, looking ahead, we are confident in our broad-based growth opportunities across AI and our other markets. Lastly, look at the Investor Relations calendar. Aehr will meet with investors at the 17th annual CES Summit in Phoenix tomorrow, Tuesday, October 7th. The following month, we're participating in Whitehall on the 16th annual Alpha Conference in New York on Tuesday, November 18th. On Tuesday, December 16th, we'll return to New York City to attend the NYC CEO Summit. We hope to see some of you at those conferences. This concludes our prepared remarks. We're now ready to take your questions. Operator, please go ahead. Thank you. At this time, we'll be conducting a question and answer session. If you would like to ask a question, please press star one on your telephone keypad. A confirmation tone will indicate your line is in the question queue. You may press star two if you would like to remove your question from the queue. For participants using speaker equipment, it may be necessary to pick up your headset before pressing the star keys. One moment, please, while we poll for questions. Once again, please press star one if you have a question or a comment. Please continue to hold while we adjust some sound tech issues. One moment. Thank you for standing by. This is the operator once again, and we'll... Christian Christian Schwab, your line is live. Please go ahead. Great, that sounds like a much better connection. Gayn, as we get into the second half of the year and these more open-ended growth opportunities in AI that you've talked about in particular, when do you think we'll see a material improvement in bookings to drive revenue down the road? That sounds an awful lot like guidance again here, but what we believe and what we've tried to communicate in our previous calls as well is that our lead, our first AI wafer-level burn-in production customer, we anticipate that they will need additional capacity that would be both bookings and revenue for this year, and that could be more than last year, and we won't put a top on that. The question is timing of that. We're not sitting on an order. We didn't get it yet and just put it in our pocket. As that order comes in, we typically will announce those within a couple of business days or so. What we are seeing is additional wafer-level customer engagements. It's pretty interesting that kind of span from processors and ASICs. Okay, can you... I'm sorry. Okay, hold on. Chris, can you hear me okay? Oh, wow. All right. I can hear you again. All right. I'll assume that Christian is unmute or something that he can hear me as well. We're seeing it across several different groups from hyperscalers, AI processors, kind of across the board. It's interesting. We have direct people that have come in saying that's what they're interested in. We have people that are talking to us about Sonoma because their current customer is already doing qualifications and are looking to do burn-in for the first time and are looking at either package and also now exploring the wafer-level side of things. These generally do take some time. I would probably guess these tend to be more second half, this being the second fiscal quarter of fiscal 2026 for us. At this point, we're just scrambling as fast as we can to address all the requests and requirements and keeping our head down to focus on them. On the packaged part, same thing, both additional qualls and additional processors that are being put on our system and its enhancements to the Sonoma, as well as we've got customer interest to do additional production customers, with and without the fully automated integration of the pick and place handler that bolts right onto the front of Sonoma. I think it's ongoing and very interesting, and we're just really happy to have this number of engaged and active customers. Operator, can you hear us? Yes, I can hear you. Are you ready for the next question? Yeah. Chris, do you have any other questions, or was... It seems a little abrupt this time. We have a question coming from Christian Schwab. Christian is live. Go ahead, please. Sorry about that, Gayn. I was telling you I could hear you, but it wasn't working. We have a few customers here currently. You talked about a bunch of more customers coming in there. As we look to the end of your fiscal year, do you have a target number of customers that you think you'll be in the process of shipping to by then or shipping to fairly shortly afterwards? That's a good question in terms of targets. Actually, we do have some discrete quantity targets. In fact, some of the KBOs, which are the bonus structures for our officers, are based upon not only numbers, but specific targeted AI customers. They're really given a lot of insight, but I would say in plural, for additional packaged part and also for wafer level. At this point, we're not really limiting ourselves, but we're just trying to be cautious about oversetting expectations either in terms of the timeline of it. It's actually one of the things that was interesting that really came to fruition, and I apologize if I said this before in the last call, is I'm starting to also understand a couple of things going on. One of them that was kind of new is there are many of the ASIC suppliers in particular, and there's some evidence within the GPU or just the processor suppliers themselves. They don't do a production burn-in like you think about it, like using one of our tools. They're doing it at system level, like as in the rack. These processors are getting all the way to the end, and then they're simply running them in rack form, sometimes at elevated temperatures and sometimes not, to try and get the first seven days of failures out of them, which is so inefficient and uses a ton of power. There's only so many processors per rack, if you will. I was sort of surprised at some of this. Some of the test vectors that we're getting from customers are not, this is on a production tool today. This is just an HTOL, which is like a qualification vector, instead of a production vector. That's because they weren't doing production yet. You're really at the leading edge of this. One thing is really clear from the data we've seen so far, the devices are failing. We do see the failures in the burn-in, so they're absolutely able to screen them using our tools at wafer and production. That creates the leading edge of this market and why we're so excited about it. I mean, it's really easy. Obviously, every single call you get on, your CEOs are talking about how they're using AI one way or the other. This is really happening to us. It was 40% of our business last year from zero. We think it's going to grow both package and wafer level this year. We're still seeing the other businesses grow as well. We're really glad to have gotten the facility upgrade behind us. There was a lot of work to get that there. Now we have the capacity to be able to ship so many more systems, particularly the high-power ones. If you come on our floor right now, you'll see AI wafer-level burn-in systems right next to Sonoma systems being built today. I think that we believe that we have the opportunity to capture multiple customers in both package and wafer level. My last question, Gayn, is, last call, you were quite enthusiastic about the TAM for AI-driven products for you to be three to five times bigger than silicon carbide. Is there a timeframe that we should be thinking about that becomes evident? I kind of asked it on the backlog question, but I'll ask it again more directly. Are we going to see material orders from one or two customers this fiscal year, or is that something that it's just too early to know, but yet you feel confident it's going to come? How should we be thinking about that? I feel the latter is the easy out to say that I'm confident they'll come. I think timing can both be, you know, a lot more guidance than we're providing right now. There's also just some of these evaluations, as we prove it, the customers can actually start contemplating how many and when they would want to install them. The new evaluation, I think we already alluded to it, it's for a processor that is expected to go into volume production at the end of next year or in the second half of next year. Tools would be needed to be going in in that timeline. If you just, we do fiscal years through, in this case, fiscal 2026 is through May of 2026. If you talk about calendar 2026, there's a lot of opportunities in play that need to play out that would be production for both wafer level as well as packaged. It's not that far away. Even something that seems like is a one year away in our space, there's a lot of work that needs to be done to actually ramp a customer to be one year out. We'll keep focused on this thing as we get a little closer. We'd hope to give you answers. To be candid, this will probably feel like you'll hear enthusiasm and we think we're winning and the customer has gotten good results. Those will be early indicators. Then we're going to surprise everyone with a large production order, not unlike what happened with the first wafer-level burn-in system, except for some of these customers are just significantly bigger. Right. Thank you. No other questions. Thank you. Thanks, Christian. Thank you. Your next question is coming from Jed Dorsheimer. Jed, your line is live. Please go ahead. Hey, Gayn. You have Mark Schutter on for Jed Dorsheimer. Hey, Mark. Congrats on the success for this quarter and the announcements and for the AI customers, and that's great. Can you give us a little color? How should we think about the engagement in the qualification cycle for these customers? Do you need like a new product cycle to occur? Do you need to slide in between Blackwell and Rubin? If you can give us a little bit of what's it like in the room with the customers, is the tenor of these guys risk aversion, or is the overwhelming demand spur some willingness to try a new equipment like Aehr? [audio distortion]. There's a lot in there. Those are good ones. All right. Let me talk about sort of the qualification process. So far in the engagements that we've had so far, we don't need a new product. We are doing some things, depending on their pitch of their probe cards, which we call our wafer packs. We may need to do some things specifically for that. We have some design for testability features that we have been touting to our customer base that allow them very short lead time, high volume, low cost wafer packs. We can also supply them at higher cost and a little bit longer lead time if they don't hit those DFT targets. We've got some of both. Like one of the engagements, we made a conversation related to them about their pitch of their devices. We're like, wow, you happen to choose a pitch on these so many pins that's driving the cost of your wafer pack up. They're like, why didn't you tell me before? They kind of joked because they hadn't talked to us before. They're like, this will be no problem to cut in for our next generation, but we're just going to have to live with it on the current one. They're engaged with us in kind of a roll up the sleeves working. The qualification in some cases is just validating that we can do the same type of DFT and power delivery as we've done with the other processors on their devices. I think customers, I get it. They're kind of like, it's hard to imagine that we can really pull this off if they haven't seen it with their own eyes. We're just showing it and demonstrating it to them, somewhat like what we ended up doing with the first silicon carbide customers. At some point, people get it. One thing that also seems to be going on is these are pretty visible. I already said that these systems are sitting on an OSAT, and there aren't that many of them. Especially not that many of the biggest, right? There's a lot of people out there that are aware of the success of this. Even though the analysts and all are still trying to figure out everything, there's a lot of people that have pretty intimate knowledge and seem to know what's happening. They're like, can you do, can I do it that way too? They're leaning in. It's a little less of complete disbelief, can you do it, but more of can you prove it for me? Now, from a timing perspective, it's just typical of the industry. Normally, when people are buying test equipment, like semiconductor test equipment like ours, you do it at some disconnect. Either you're putting a new fab in if you're an IBM, or it's with some new product, or if simply the volume is growing so fast that you want to buy a tool that has more output per dollar or so. In this case, outside of one supplier, everybody's using TSMC today, and eventually Tesla will be using the Samsung stuff. It's not like there's a new fab, although there are new fabs coming online. People are just getting access to those TSMC wafers and then want to be able to test them. They either do it in a packaged part burn-in on something like Sonoma or a system-level test or all the way back at the rack. Customers are engaging because they need to buy capacity for these new products and for new things coming out. It is a fair way of looking at it to look at the intercept between product A to product B. That's at least what's been communicated to us with this latest one we just announced. Similarly, our first customer intercepted us with their transition to a newer device. We announced that a year ago. That's pretty typical, and sometimes that's the gating item of their timing. Sometimes that's fast or slow, but you need to time it with that, just the tenor of the tone. If you guys, people that have followed us, understand that our value proposition or our pitch, if you will, is that semiconductors are growing extremely high. Within, it took 40 years to get to $500 billion. It's going to take less than 10 to double that. Much of that is driven by either directly AI or all of the pieces surrounding all of the explosive data center growth. What's happening is people, these devices are not more reliable for multiple reasons. The smaller and smaller geometries and the fact that they're putting multiple devices into one package because they can't make the devices any bigger are driving the requirements for reliability and burn-in tests. If you look at the roadmaps from all of the players, every single one of them, from all of the NVIDIA products to everyone else from the ASIC suppliers, all their products going forward are pulling multiple compute processors to make it generic in a single package, along with many stacks of HBM and ultimately optical I/O chipsets. They put these on these complex advanced packaging substrates, and they're extremely expensive. I always remind people, the reason you burn them in is because they fail. When they fail, you take out all the other devices. The value proposition, if someone could ever do wafer-level burn-in, is overwhelming because the cost of the wafer-level burn-in is cheaper than the yield loss. I actually alluded to it in my prepared remarks that our lead customer for packaged part burn-in is going to do a couple few generations in packaged part and then wants to switch to wafer-level. What are they going to do with all those Sonomas? It doesn't matter. The yield advantage of moving it to wafer-level pays for it all. That is a thing, that's a macro trend heading our way. It's not just AI. It happened to us in the silicon carbide side of things. We see it in stacked memories in both DRAM and flash. We see it in other complex devices and gallium nitride that are going to automotive that are mixing different devices together and why it's driving for wafer-level. These large trends are good for both reliability as a tide that's rising for all and really good for us, but also for our unique products, with particularly the Sonoma and the high-power wafer-level burn-in systems we have with our Fox products. Gayn, all that color is very helpful. Thank you. To dig in a bit around that last part of the Sonoma versus the Fox products, what are the, what's the gating factor of why customers are going first with the Sonoma and not right to wafer-level burn-in? What needs to be proven out for wafer-level burn-in for those customers? I'm assuming there's a sales cycle there of you'd like to start with Sonoma and then push people to wafer-level burn-in. How does that transition go? Yeah, you know, the way we look at it is we say we're just neutral. If you want to do packaged part or you want to do wafer-level, we love you both. It's not easy to just go, you know, talk someone out of whatever it is they're used to. In this case, we don't have to. We just say, listen, we think we make the best machine for qualification reliability of your complex packages with Sonoma. They can test all the processors, HBM, and all the chipsets inside of it in a single pass during your qualls. If you want, we'll do it in production as well. We're now adding automation to it. If you'd like to kind of go to the next step, you could take the high-failing devices out of there and do a wafer-level burn-in of them before you put them in those packages. Our data would suggest you don't need to burn them in again. If you still need a little burn-in, that may be fine, but you don't want to have the massive yield loss. Some of these processors have four and eight CPU chips in them, right? Process, you know, compute chips, and have another, you know, six or eight HBM stacks on it. Just the co-loss substrate is extremely expensive and rare. It makes sense to go to wafer-level. To be candid, one year ago, 12 months ago, we didn't even have the first order. There was not one machine in the world that could do a wafer-level burn-in of an AI processor. None. We're the only ones, and we now have just shipped our first systems, and you know, we're at the front end of this thing. I understand people are sort of in a doubting mode. Let us prove it to them. For those that are on the call, if you have a processor, we can, you can sit down with us under non-disclosure. We can, I guess, tell you which exact specific files we need, and we can do a paper benchmark and give you an answer within a couple of days as to the feasibility of your devices. So far, we have not found one that we haven't been able to test, that we've been given that detailed data on. I'm sure there are some out there, but for now, we're on a roll. Thanks, Gayn. Much appreciated. Thank you. Your next question is coming from Bradford Ferguson. Bradford, your line is live. Please go ahead. Hello, Gayn. I'm curious about the cost to wait till you get to the motherboard or the packaged part or the final part. When we were talking about silicon carbide, you could have 24 or 48 SiC devices on one inverter, and you know, then the whole inverter's bad, and maybe that's a thousand or two thousand dollars, but you know, the retail price on these NVIDIAs is what, $40,000? The rumor is they have really high margins, and I'd love it if the customers would give me credit for their sales price. They really only give me credit for their cost, but fair enough. Their cost is significantly higher than any silicon carbide module ever would be. Fair enough. I mean, it's, you know, by the way, to me, the craziest thing is how many people are doing it at the rack level. You're talking about all the way at the computer level side of things and burning it in. Obviously, a failure there is a lot more expensive than it would be all the way back at wafer level. You want to move, in our industry, we prefer to shift left. You want it to go as far left in the process as possible because it's way more cost-effective. In this case, we have the first two steps in the left side, wafer level, and when it's just the module level, before that module is then put actually into the system level, where you'd start to see all of the power supplies and everything else on it, like the GB200 module itself. You'd certainly want to do this before it goes over to Supermicro or to Dell or something in some mainframe rack. One thing to put in perspective, and I don't think this is the value proposition yet, but it is interesting. We know that people are doing this burn-in at the rack level or the computer level. When you're in the computer level, basically what burn-in does is you're basically applying a stress condition of power via voltages or current and temperature. What it does is it accelerates the life of the part without killing it. I can take a device and in 24 hours make it look like it's one year old. If it hasn't died by then, it's going to last 20 years. There are all kinds of books on it. You can read it, Google it, or something, and you can find out about the basic process of burn-in and why you do it. The key here is you want to do it in 24 hours or four hours or two hours or something along those lines to get the infant mortality rate out so it doesn't shift to the customer or take down your large language model compilation. Now, when you're at system level, you can't run that rack at 125°C. Everything will burn up. In fact, those racks are running cold water through them. They're probably running 30°C temperature maximum. I know of a company that was trying to do some things to try and get an isolation of the GPU or the processors to 60°C, and their burn-in time was measured in days at the system level. That's what they were doing. Now, by moving it to wafer level, we can actually run the devices at a junction temperature at 125°C, which is an accelerant that's more than 10x. We can also run the voltages extremely closely to their edge, and we can get the burn-in times to come down. When we do that, we're actually applying only power to the processor, not the HBM, not all the inefficiencies everywhere else, not the rack and et cetera, just to the processor. We can do it for a significantly less amount of time. The long and short of it is I can burn it in to the same level of quality at a fraction of the power. I don't think anyone's going to buy our system because of that per se, although there's some argument for it. You know what's hard? Getting a permit for a megawatt burn-in floor for your racks. People may buy our systems because they can actually get the power infrastructure to burn in hundreds of wafers at a time in parallel in a regular 480 volt, maybe 4,000, 1,000 or multi-thousand amp circuit like we have in our building. You wouldn't be able to do that. If you had to burn in a bunch of racks in our building, you wouldn't be able to do it. I could have 10 systems running with nine wafers apiece and test 100 wafers at a time with the power that I have in my facility, which is not that atypical of a facility in the Bay Area in Silicon Valley. There is a value proposition there. In addition to the real cost savings, it might just be feasibility of power. You mentioned the high-bandwidth flash. I'm hearing from some systems makers that they're focused on burn-in more just because of how expensive it is to scrap the whole motherboard or whatever. Do you have any kind of end to high-bandwidth memory, or is it mainly the high-bandwidth flash? Yeah, I mean, we've talked that kind of our first, our belief was that the engagements and the interest was first on the HBF, yeah, on the flash side of things. There is some things, there's discussions on the DRAM side of things. I mean, people are really scrambling to try and solve that through all kinds of mechanisms, and I won't get in all the technological things that we understand. You know, there's very different implications when you talk about Micron, Samsung, and Hynix, and what they do and how they stack their memories and how they test them and burn them in that have, you know, kind of key differentiating features amongst themselves that make tests interesting. We have a pretty good insight to that. I'm certainly not going to talk about it publicly, but that makes that interesting. Bottom line is, you know, high-bandwidth memory and then eventually high-bandwidth flash needs to be burnt in and needs to have a cycle and stress to remove that somehow, or it's going to show up as it has been in the processors, in the AI stacks. You know, and that, you know, that's widely known and understood. NVIDIA came out last, what, six months ago, yelled at everybody and said, you need to figure out how to burn these things in before you ship them to me. We're sick and tired of it. I'm not creating rumors. Those are widely understood reports. Right now, what we're seeing in the test community is sort of, you know, people overuse, you know, the wild left, but there's just people scrambling for good ideas on how to address this and running as fast as they can. It makes it exciting every day when you show up to work and you've got people that are like, how can, you know, how can you help us? I love our hand. I love the cards we're dealt right now. I love our position. I love our visibility that we have within. Pretty much all we've, I think we can now say we have communicated with every single one of the AI players, and, you know, we have a line into them and some thread, either package or wafer level related that gives us some great insights. I think we may be completely unique in that realm. I think the HBF is, it looks pretty interesting. Again, you know, that stuff takes time, but more and more things are breaking the infrastructure of tests because of power at wafer level, and that's a good thing for us. We're really good at that. Our system, you know, I just throw out 3.5 kilowatts per wafer, and, you know, most people would not know what that means. That's crazy. I mean, you know, the world has wafer probers, you know, thousands of those installed that have 300 watts of power capability. If you try to go get a prober that has 1,500 to 2,000 watts, it's a specialized half a million dollar prober. It's what we ship with the CP to the hard disk drive guys. That's one wafer's capacity. Our systems can do 3,500 watts on each of nine wafers in one machine. Nobody can do 3,500 watts on one wafer on one machine. People are coming to us because of the thermal capabilities that are unique. Many, if not most of them, are patented around the whole wafer pack concept and what we in the blade where we deliver thermal power without a wafer prober to create uniformity across a 3,000 plus watt wafer is really awesome. It's fun to talk about with the technical people. I'd say that people are quite impressed with what they hear. It's great to rotate people through here. By the way, they see it. We can show them it in operation when they come. This is not a story. I think the more and more of these things, the rising tide, the better shape we're in. We're not abandoning our silicon carbide customers that are listening. I know they have ramps. They have opportunities. There's new fabs. There's new capacity coming on. They have new technologies. We're not abandoning the OEMs, the electric vehicle suppliers that we have met with personally and helped them to develop the burn-in structures and the burn-in plans that they drive their vendors towards. We're fully committed to those guys and we'll be there as they ramp. We have more capacity than we ever had to be able to address their needs at a lower price point. I think we got that covered. We're not pivoting the company. We're just adding to it with this AI stuff. On silicon carbide, this will be my last one. Thank you for your generosity. On Semi, I think one reason for their success is how aggressively they adopted Aehr Test Systems, FoxXP systems. We have a pretty large bankruptcy that happened with one of their competitors. Is there some kind of risk for the other chip makers if they don't take burn-in more seriously that it could spell issues for them? Let me answer it this way. I have been invited to be a keynote speaker. I have spoken at multiple technical conferences around the world in silicon carbide, and Gayn and I have tried conferences, have sat on several panels, and I have been very, almost emotional in some of those discussions because we have seen the test and burn-in data of almost all of the wafers in the world. That's pretty bold. Certainly more than anyone by far. Everybody would like to think that they are special and their devices are just so much better than everybody else's. The reality is that these devices fail during burn-in that represent the actual duty cycle or what's called the mission profile of electric vehicles. What that means is if you do not burn them in, it is our belief in the data that we have, they will fail during the life of the car. Period. We've talked about that. I think I've quoted several times. Whatever you do, it is my opinion, never buy an electric vehicle that didn't have burn-in for something in the, you know, 6 to 18 hours, depending on the size of the engine and things like that. There are OEM suppliers that have the data. They have failed customers who tried to qualify without doing an extensive burn-in and kicked them out. There have been very large suppliers that have lost in the industry because of quality and reliability. My call to arms for everybody is there's no reason not to do wafer-level burn-in or packaged part if you know, if you don't want to go with us. Whatever you do, don't skip it. We now, with our 18-wafer system, even at high voltage, have extended the capability with more capabilities. The cost of test at high voltage on our system, with a capital depreciation of five years, is about $0.005 per die on an eight-inch silicon carbide inverter wafer per hour. Per hour. You can do 24 hours of burn-in for $0.12 a die. We have been very clear with that to all the OEMs, and they understand it. They drive for a level of quality that they can measure directly on our tools from their suppliers. I think there is a difference between the people that have adopted a high level of quality and reliability and their market share. All I'll say is, I think On Semiconductor has done an incredible job. In 2019, I think the year before, they had done $10 million in silicon carbide, and they're now, you know, kind of neck and neck for market leadership. They have won well more than their fair share of the industry across Europe, the U.S., Japan, and even China. They have done really, really well, and I commend them for that. Thank you. Your next question is coming from Larry Chlebina. Larry, your line is live. Please go ahead. Hi, Gayn. The news today on the AMD hookup with OpenAI, does that accelerate your evaluation process that you have with that second processor, or does that put more pressure on getting that done? We have not talked to the level of detail to determine who it is. We've given enough hints that it's amongst the top suppliers of AI. It's not one of the ASIC guys. I'm going to try and avoid being more specific. I will restate we are in conversation with every one of the suppliers, and I will then say including those guys. My interpretation of that is, honestly, it just sort of warms my heart to see the different people's commitment to the different types of processors. I mean, without going into whether they are or could or might already be a customer or not, one thing about AMDs, and we've used that, and again, not as an endorsement to them, we've used them as one of the examples because their MI325 has eight processor chips, in addition to, I think, at least that many HBM stacks plus a chipset. One substrate, if there's anyone that I would be doing wafer-level burn-in, it would be amongst them. For example, right now we provide opportunities for our customers, including the likes of those guys, to buy our tools for their burn-in requirements for qualifications, either themselves or to use it at one of the many test houses that have our systems, to use our systems for packaged part burn-in for the lowest cost alternative to things like system-level test systems that are being used out there. If the most advanced process would be to do wafer-level burn-in over time. I won't comment on anything more than that. Sorry, Larry. No, sir. I think in general, I think good news for the processor market is generally good for us right now. The optical IO opportunity, is that going to involve actually new machines instead of upgrading existing machines? Is that transition going to happen here shortly? Or do they have more machines that they're going to... The forecast includes both. More upgrades and more new machines. They're going to be running out of machines to upgrade, don't they? Yeah. There's also a scenario where they also have a bunch of products on the current machines that haven't gone away. You know, it's sort of, you know, while you're upgrading these systems, they're backwards compatible. You can still use the old wafer packs and everything on them. Nevertheless, it's both. The other thing, and it's subtle and those that don't know it. We introduced a couple of years ago a front end to the Fox systems that allow you for fully hands-free operation with a wafer pack aligner. You can come up to that with FOUPs, in this case for 300 millimeter, with both overhead or AGV, automatic ground vehicles, with an E86 compliant port that allows you to not even come and touch the machine. The wafers can run around on the fab and they can run a burn-in cycle and then move on and go to the next step of test. You can upgrade them with the automation as well then. Exactly. We took what we actually took their tools that they had bought in the past with our older wafer pack aligners, and they are now upgrading to the new wafer pack aligner. Instead of it being offline, it's integrated with the system. That's kind of the good way. That's the advanced way of doing it, and particularly when you think about 300 millimeter fabs of like memory, big AI processors, even the silicon photonics, you kind of want to do it. That's the best way of doing it. Full automation. If they don't, if they want offline, they can do that too with us. On this HBF opportunity, is this a different company other than who you've been working with for two and a half years? What's that? Same company, just evolving requirements. Okay. Do you expect anything to break loose on the original enterprise flash application, or is this going to continue on? It kind of feels like this is, I was going to say trumping it, but that word means something different these days. It feels like this is such an enormous opportunity to the flash guys that it's sort of like, you know, the shiny bright light that may actually be better for us. I'm not sure it's better in terms of near term, like, you know, the opportunities are as fast. We'll see. They could configure a system. The new system configuration is a superset of the old requirements, and so we had already worked on the previous one, and we're working on an updated proposal to show them how they could build blades in our system that could do both their old devices and the new ones. Maybe that'll help it be better. I think it is, but you know, it's always interesting when things change. The one thing, none of their old tools will work with this HBF flash. No, I wouldn't think so. Maybe that's a good thing for us, right? All right. That's all I had. I'll see you tomorrow, I guess. Thanks, Larry. Larry's just alluding to, we're going to be over, we're here at Semicon in Arizona, Semicon West, and there's this CEO summit that Chris alluded to. Although, Chris, I don't know if you knew this, you were breaking up. It sounds like we had operator problems with the operator connection. The new one has been a lot better. Sorry about that to folks that are on the line. Operator, any other questions? Yeah, I'm showing there are no further questions in queue at this time. I'd now like to hand the floor back to management for closing remarks. Okay, thank you. I meant to try and work this in. I'm going to do one little other thing. There's one we haven't talked about, and maybe next call we'll spend a little bit more time on. We did a deep dive last time on the AI side of things. This time was more of an update on things. There are other products that we have, and one of the things I want to highlight is the activities that we have within packaged part outside of AI. It turns out that with the Intel acquisition, they have a low power and a medium power system called Echo and Tahoe that we've been shipping a lot of systems kind of quietly in the background. Recently we've had some customers, I think, egged on by some competitors that were saying, oh, Aehr isn't even doing that stuff anymore. That's just not true. These products are beloved by the customers for their software, their flexibility, and they did a really good job. In fact, those products were the products that honestly took air out of the packaged part burn-in market because the products were just better than ours. We still love those. If you come on our floor, you'll see them being built right alongside the Sonoma systems and our Fox systems as well. A message out to our customers, we still love you. We're still committed to supporting those products. We have way more manufacturing capacity than Intel ever did. Don't be timid. We're happy to continue to ship as we have. We'll give the investors a little bit more insight on some of the systems we're building right now, some of the interesting applications that they're going into that are also another part of this overall shift of all semiconductors needing more and more reliability tests from qualifications to burn-in. With that, I thank everybody, and we appreciate your time and putting up with a little bit of the stuff going on with the call. We'll work on that and make sure we do better next time. We appreciate you. Thank you now. Goodbye. Thank you. This does conclude today's conference call. You may disconnect your phone lines at this time and have a wonderful day. Thank you once again for your participation.