I'm Joe Moore, from Morgan Stanley. Very happy to have with us here today, Mark Papermaster, the Chief Technology Officer of AMD. Maybe we could just get started with a couple bigger picture questions. I mean, I guess as you guys think about competing in both microprocessors and graphics with companies that spend more than you know, but you have a better GPU than Intel has and a better CPU than NVIDIA has, and you've certainly succeeded in both of those markets. Can you just talk about, you know, the challenges of doing that and the opportunities of having both of those technologies going forward? Absolutely, Joe. First of all, thanks for having me here. We are in an incredibly exciting market, compute, because it's just exploding. It's been exploding, and it's doing nothing but going to a steeper and steeper hyperbolic growth. What we said for years, we said for the last decade, that servicing this explosive demand in compute requires not just one engine, but multiple engines. That's been our strategy for over a decade at AMD. Having both the CPU and GPU were quite fundamental to us. It was prescient by leaders in AMD. It was driven first to accelerate with the graphics processing that is embedded with a CPU, which all of us use in most any mobile device or desktop device we have today, the PC and the mobile industry. What we already knew back then, and has done nothing but move faster than we originally anticipated, was that combination of CPU, GPU, and other accelerators in the data center in the most demanding workloads. You saw that first in high-performance computing. That's high-performance computing, HPC is always the harbinger, Joe, of the most demanding workloads. AI has turned to be the biggest consumer of these high-performance heterogeneous workloads. Because of the nature of the algorithms, it needs CPU, GPU, and specialized accelerators. That's what makes it an incredibly exciting time for the industry, and it makes us at AMD incredibly excited because this is the vision that we've been working for. This is the portfolio that we've steadily built up year after year, and we believe we're positioned very, very well for this hyperbolic growth. Great. Maybe we could talk a little bit before we get into the products and markets about the role of process technology for you guys. You know, you haven't really been on the very bleeding edge. You didn't anticipate some of Intel's struggles, and you ended up having significant leadership. As you think about this going forward, you know, do you need to push the envelope a little bit more on process technology? You know, do you assume that Intel will right the ship at some point, and how you think you're gonna be able to compete with them as they do? Process technology, obviously, you know, think about it as foundational in our, in our semiconductor industry. And you might say, is that changing as, you know, as technology evolves? I mean, Joe Moore, you don't ever slow down, but Moore's Law, it's slowing down. The, the cost of transistors is going up per node. The, the type of scaling you get, the type of circuitry that gets the benefit out of each new technology node is getting less. Some of the circuit types don't scale. So what that means is design and process technology have always been important, but now they have to be, you know, really designed in a partnership. And that's what we do extremely well. So we've led with a design approach that anticipated the slowing of Moore's Law. About a decade ago, we reengineered AMD engineering approach. We went to a modular approach. We came up with what we called the Infinity Architecture, so we could partition out these different circuit types. A CPU engine, a GPU engine, separated from the circuitry that you use to connect it to the IO, to connect it to the memory around it. We did that to give us scale. This allowed us to punch above our weight with the resources we had, 'cause then we could reuse circuitry across our portfolio, share it across product lines, and we did it because we anticipated the change in rate and pace of circuit technology. That said, the new nodes remain vitally important, and they mostly remain important for the engine itself. Those transistors want to operate at the most efficiency you can, and that's what each technology node new brings. Remember I said the transistors in a new node are getting more expensive, but they're still giving you efficiency gains, more performance at less watts of energy expended. With our modular approach, Joe, we work very closely. We're, you know, partnered with TSMC, GlobalFoundries. You know, we're always looking at other foundry options. With TSMC is our primary partner and who we deeply partner in design technology co-optimization, DTCO. We are, for high performance, pretty much the lead intro of each new node. As such, we've leveraged that modular technology to put the new node where it gives you the most benefit. It remains important, going forward, really, as far as I can see in the process technology roadmaps. Great. Thank you for that. Maybe we'll shift to some of the end markets, starting with server. If you could talk about the importance of Genoa. I know this is a really important new product for you guys. You've talked about it being kind of a, a bigger ramp, a, a more transitional ramp where, you know, Milan and Genoa kind of both do the heavy lifting over the course of the year. Can you just talk about the importance of Genoa in your roadmap? Genoa is, you know, it's our fourth generation X86 EPYC server. As the fourth generation, it incorporates all of the learning of the previous three. What we really wanted to achieve and did achieve with Genoa was a huge step in total cost of ownership, TCO. That's the buying factor for our enterprise and our data, you know, our big, hyperscale accounts. As such, we designed it with a 96-core base. That's the base node, 96 cores with lots of IO, 128 IO PCIe Gen5 lanes. Gen5 was a step forward on the interconnect standard. Has 12 channels of DDR5 memory. That's a new memory interface. The CPU is in 5 nm. That's a new technology node, which has ramped exactly as expected with our partner TSMC. It was a big step forward. With that type of generational change and a new socket, so all that new memory, new IO goes in a new socket. And that is a longer adoption cycle. It goes first, you know, in the hyperscale nodes. Enterprise can then take advantage of it, but it's a more purposeful ramp for us. The reason is that Milan, the third generation EPYC, is still the TCO advantage out in the marketplace. It's 64 cores in a really efficient, cost-efficient, and performance-efficient 7 nm node. When you look at our stack up, Milan third generation EPYC is a huge piece of our product stack along with Genoa on top. That third generation still is a performance leader in a number of cases versus the just released competitor of x86 servers. It's third generation, very, very strong. Fourth generation knocks it out of the park with a total cost of ownership and a consolidation play. It is indeed a very, very important ramp for us. It's a very purposeful ramp, and it's going right on track. Okay. Can you talk to. I know there was a prominent blogger who talked about an issue with some kind of single channel DDR5, only having a single channel available for DDR5. I don't, you know, it seems like you guys have, you know, disagreed with some of those conclusions, but I guess just bigger picture, you've said it's on track. You've said you're where you want it to be. Is there anything that changes with that platform in the second half that increases rate of adoption? No. You're talking about a single DIMM per channel, one DPC. That's the predominant implementation of Genoa. That's what the vast majority of our customers use. Running that at 4,800 speed, that was our primary plan for launch, and that's what we did. The two DIMM per channel, which is I think what you're referring to, is following. That is for a targeted, it's a much smaller targeted set of customers. Those speeds will be announced later this quarter. And you know, that will ramp as well, but this number of customers for two DIMMs per channel is much smaller. Okay, that's helpful. I wonder if we could talk about server, you know, your server progress really in three segments. If enterprise server, enterprise-facing cloud, and then kind of more, you know, internal-facing cloud. Enterprise server, I think your share is the smallest, but I know you've made some inroads there. Can you talk to your progress? You bet. You know, first of all, let's go in the order of, you know, first internal properties at the hyperscale. That is the fastest adoption. You've seen us grow across our EPYC server lines most quickly there. The reason is when you have a kind of performance and energy efficiency and TCO advantage like we've had with EPYC, that's an easy transition for hyperscale because they're massive buyers. They see the TCO advantage. They have a set of workloads. It's X86, so it lifts and shifts, and you're running, you're getting all of that TCO advantage. Historically, you know, and with Genoa, you know, that's just, you know, a very, very, a very fluid ramp, and it, and it's just very straightforward with the TCO benefits that we bring. With enterprise, you know, that is generally a little bit of a lower core count because the, you know, the VMs that the hyperscales have, the virtual machines, they can take advantage of the full density that we have in EPYC. Some of the enterprise accounts still prefer a lower density of cores. We of course have that. We have a full stack up. What we've done is two things. We've increased the sales force that we have that's really educating our enterprise customers on the commanding TCO and the commanding sustainability gains that we have. We have such a energy efficiency for a compute. CIOs are asked by their boards constantly, "What are you doing for sustainability?" Well, EPYC's a big piece of that answer because it brings such a energy efficiency to the compute. With that, we're increasing, you know, our awareness in the enterprise industry. We've made a tremendous gains in our structure and basically our feet on the street and our focus for enterprise. We've also created, and you'll see, we just put some news on that out today, a very easy way to do a virtual machine migration from if you're running our competitor's x86 platform, to run a very straight push button virtual machine VM migration over to EPYC. We think that will be a big assist as well with enterprise. You know, there's a third category, and that's where people are running both in the cloud and on-prem, and they're moving workloads back and forth. We do that at our IT instantiation at AMD, and we're extremely well suited for that case. We have such a high presence in the cloud. You can mimic that in your on-prem, and shift your workloads, back seamlessly. When you think about those bigger cloud workloads, the more, you know, internal facing, can you talk about the role of the sort of more cloud native products like Bergamo? Mm-hmm. that you're coming out with? Is that market gonna be, you know, more competitive with other architectures? We've seen some Arm encroachment, things like that. Can you talk to that? Yeah. Cloud native, you look at some of these cloud native applications, Java being one of them, and there's many others, Java workloads is what I refer to. They don't need necessarily the highest frequency. They need a lot of throughput. They need a lot of core density. They don't need to run at the highest performance, the highest frequency. What is the nature of the culture that we have at AMD is we listen. We listen to our customers. We see where workloads are going. In this case, we saw that, and we are quickly pivot our roadmap to add a swim lane, to add a product, meaning the dense cores you've mentioned, code-named Bergamo. Genoa, instruction sets, ID, you know, you run the same code exactly as you optimize on Genoa. You can run it on Bergamo. It's optimized for cloud native. Instead of a 96-core cluster, it's 128 cores. Doesn't run at the same peak frequency of Genoa, and it's optimized for cloud native. We think we're very, very excited about coming out, first half of this year, right on track. It really, you know, provides that compute density advantage for cloud native. Even more importantly, just like when we added our 3D stack cache, that accelerated, you know, workloads and such as high performance compute and seismic analysis, et cetera, it shows you that AMD is gonna continue to listen to the customers, understand where the workloads are going, Joe, and make sure that we're there, and we're there with our economy of scale in making microprocessors. That is a key facet that we bring to our customers. Anyone can make their own silicon and optimize it for a specific workload. We have the advantage of making millions and millions of processors each year with finely tuned, you know, process, both development, test, manufacturing, reliability to serve these markets that at the, you know, enterprise and data center greater quality required. Thank you. I wonder if we could shift to within data center still, the role of GPUs. Mm-hmm. You know, you guys have been successful in cloud gaming, in areas like supercomputers. You know, where are you when it comes to more of the machine learning type workloads, you know, in terms of progress there, and where is that gonna go going forward? Oh, thanks for the question, Joe. We had a very thoughtful approach when we saw where AI was going, because we knew the type of compute that it needed. It really gets accelerated by parallel processing. It's the nature of the algorithms when you do both a forward propagation and a reverse propagation to complete that learning loop. It's very much a needs parallel processing, vector processing. Our strategy was we knew we could develop the leading-edge hardware. We started on that path with our AMD Instinct line of GPU processors, and we focused first on HPC. HPC, given the deep heritage we had, we had a very, very good software stack already to build upon. It's called the ROCm stack. ROCm 4.0 was released a couple of years ago, that was production level for HPC. Having this type of leading-edge hardware and a production HPC stack led to key wins across the HPC sector. While that entire development effort was going on in HPC, we were in parallel optimizing for AI workloads, adding support for PyTorch, adding support for TensorFlow and other frameworks, and as well as optimizing within our GPU instruction set to speed the processing. Really excited with the advent late last year of ROCm 5.0. The fifth generation of our software stack, ROCm, is production level for AI. Now if you go to PyTorch, you see only 2 software stacks rated at production level on Linux. That is AMD and our GPU compute competitor, NVIDIA. We're really pleased with the progress that we're making. MI250, Instinct 250, is out in production today, winning in HPC, and now at the early innings of growing on that now production level AI software stack. Instinct is at Azure. You heard in announcements last year that Azure was standing up MI250 and starting and really they've been tremendous partners with us to tune workloads needed to run on MI250. That's the first marker is we're out of the starting gates with MI250. We're incredibly excited about the performance with MI250. It takes on the A100 head on. Our strategy is when you have a hardware that's completely competitive and a software which is coming up rapidly, but not covering every market, is to focus where we target that software stack. We're targeted, Joe, on the hyperscalers rather than trying to hit every, you know, vertical market that may need, you know, a tremendous amount of code. It is well underway with MI250 and MI300. Our next generation is on track. We'll be announcing that second half of this year. That's a beast because it takes four GPU CPUs, uh, four Genoa CPUs and embeds it with our graphics processing. Just like we shipped combined CPU and GPU for years, in, you know, PC and embedded markets, we've now brought that approach to the data center with the Instinct 300. We couldn't be more excited to launch that next year. It's gonna bring commanding HPC, and it was equally optimized for AI. Again, coming to market, and being announced second half this year and ramping in 2024. Great. Last data center question, I guess, on inference. With the focus now on generative AI and cost per query as people start to move to those types of workloads, you know, how does AMD view that? Is that a CPU problem to solve? Is it a GPU problem to solve? You know, and what do you think AMD's role is going to be? Joe, great question. The answer is, it's all of that. Why is that? Inferencing is simply everywhere now. It's in, you know, it's going to be. It's either there or going to be in almost every device that you interface with, whether it be, you know, a device on your home on the wall that's doing natural language recognition or processing of some of the telemetry it has, all the way to, you know, the biggest compute devices, which are out there and optimizing the way that you do your work, the way that you program and code, the way that you know, write your next speech, Joe, that you're giving. You might be tapping into ChatGPT and using the inference capabilities there. Every example I gave requires a different inferencing. Let's start with the latest example. You wanna use ChatGPT to help you in that next speech, you're gonna need an inferencing capability that mimics that large language model where the training was done in a GPU and certainly with a larger memory space. It may not have to be a GPU, but it's gonna have to really be able to process that large language model. As you step through the other applications, there's different requirements. At AMD, what we're trying to bring is the right inferencing solution for the right inferencing problem. It is a GPU for a very dense large language model inferencing and typically done in hyperscale. It's leveraging the AI Engine that we've successfully is shipping. It came to AMD in the Xilinx acquisition. A performance leading AI Engine with a robust production level inference optimization stack. That's shipping in our Xilinx adaptive compute product line and it's being permeated over time elsewhere across our product roadmap. Again, inferencing to run everywhere. We started already. We Lisa Su announced at CES our Ryzen 7000 product line that has embedded in it an AI Engine that accelerates inference workloads on PC or embedded applications. Go back to the CPU. CPU is the workhorse of inferencing today because if it's a lower level inference that can run on the CPU that you actually have with you in your PC today or in your data center product you have today, you know, that's still where the bulk of inferencing is done. To that end, we added a vector neural net instruction acceleration and AVX-512 into our fourth generation Zen, which is in Genoa on the EPYC line, and it's in our Ryzen 7000, which I mentioned just a moment ago for PCs and embedded. Great. I did wanna ask just one question that I'm getting a lot in the last couple days. Chinese server company Inspur was added to the Entity List last week. Can you talk to whether it's, you know, is it too early to say how much impact there is to AMD? Well, AMD, like everyone in our industry, we of course follow, you know, all of the guidelines of export controls from the U.S. government, including of course the Entity List. We did see that news, but we're seeking clarification, as I think the rest of the industry is, because Inspur is a large holding company. It serves many markets. We're looking to get clarification on those guidelines. Of course, we'll abide by the resulting information. Great. Thank you. Shifting gears to Xilinx, you know, which you guys have now owned for a while. You know, where have you seen the synergies of that acquisition? Is it primarily, you know, bringing AMD CPUs into the embedded space? Do you still see opportunities for Xilinx in the compute space? Just talk generally to the opportunity there. Joe, we actually just hit on February 14th, our one-year anniversary of closing acquisition of Xilinx, and we could not be happier with how the integration has gone. The cultures of the company were very, very aligned. The engineers have just really enjoyed coming together. You, you see that synergy across our product implementation, and you see it in terms of how we're going to market with these products together. You know, when we talked about the acquisition, we talked about what was very, very clear at the time. Look at the embedded markets, that's what you started with. You can look at the comms sector, where with the advent of 5G, we now, the new AMD, has an end-to-end from the control plane with the presence we already have with our EPYC product line. By the way, that is expanded because the fourth generation EPYC adds Siena, a telco-optimized version of our fourth generation EPYC coming out second half of this year. That's now paired with the rich portfolio Xilinx had to attack the comms and 5G space with a large install base. That was sort of the obvious synergy that we expected. You couldn't have seen that more on display than Mobile World Congress just the prior week, where you can just read the press. It was well-received, the depth and breadth and competitiveness of the AMD portfolio that we have end-to-end to address telco. Beyond that, what we've seen is the synergies in other embedded markets like automotive. A traditional, you know, the legacy AMD had wins in automotive. You look at, you know, for instance, the Tesla entertainment and others. Many legacy Xilinx wins across the embedded space in LIDAR, and, you know, parking and image recognition and analysis, et cetera. That, that's gone as expected. What's gone beyond our expectation is what we've done with AI Engine. Already launching that, the AI Engine that came from Xilinx, and the, as I said, the PC and embedded space, as I mentioned earlier in my comments, and we see opportunities for it elsewhere in the portfolio. More importantly, the software stack that Victor Peng and the Xilinx team brought in on AI was very mature, and it pairs very, very well with ROCm, the existing AI software stack that AMD had. We announced recently that we're bringing all of that together under Victor Peng. All of our AI efforts are centralized under Victor in a very, very concerted AI effort across AMD. Very excited about that. Great. I did wanna ask you about client compute. The market share has gotten very noisy in a challenging market. There's been inventory kind of build from everywhere. You know, where do you think you are today from a market share standpoint? Intel seems more competitive in some of the desktop areas, but you guys are still getting significant wins in commercial and notebook. Can you just talk in general to how you see that shaking out? We have a very competitive roadmap, uh, for client and, and, uh, a great roadmap coming forward. It, it is very synergistic, uh, to the AMD portfolio. Again, I talked to you about the modular approach, uh, that we adopted years ago. Uh, and what the PC market benefits from at AMD, uh, is all of the focus that we have on performance and performance for watt of energy, uh, uh, flows right in, uh, to the PC market synergistically with our, uh, data center, uh, and, uh, and server compute market. So when you look at our roadmap, uh, you, you look at the latest desktop announcement, it is the, uh, you know, the Ryzen, uh, 7900, and it has a commanding desktop leadership. It has a vertically stacked 3D cache on top of the CPU chip, which allows it to simply scream in the most demanding applications like gaming, which is one of the highest purchasers of high performance desktops. Also, you know, workstation applications, et cetera, benefit from this construct. You see the portfolio synergy. That type of investment to 3D stack with hybrid bonding, a cache memory right on top of CPU, could not happen without the modular approach and sharing that same technology with our, with our server. Likewise, on notebook, you see that synergy with our graphics market. The Ryzen 7000 Series has not only that fourth generation Zen processor, but RDNA 3, our latest generation of graphics processing. It is an absolute leader in notebook processing, absolute leader in battery life, and it's the first x86 processor to embed AI acceleration with the AI Engine that I mentioned earlier. A leadership roadmap. It's a very competitive market. You know, the TAM is expected to be slightly down this year, about 260 million units is what we are projecting. It's a great market for us, and it really leverages the synergy of our portfolio. Okay, great. Well, that brings us up to the end of our time. Mark, thank you so much. Appreciate it. Thank you very much for having me, Joe. Thank you.