This year, of course, we expect the market to stabilize and probably be a little bit up. So these are all the metrics that you care about, and one thing that we are very, very proud because it's the measurement, our differentiation, our gross margin. So we can command a pretty good gross margin in the company because of our differentiated technology. My CEO, Rick Wallace, all the time tells me that the best proof of how differentiated our product portfolio and the solution portfolio is, is just pretty much to command high gross margin. This is what we are proud of. So we are in many, many spaces in the electronic ecosystem. Of course, in the wafers, logic, memory, specialty, legacy, wafer- level packaging and component, is particularly wafer- level packaging that is going to be the main topic of my speech, but also we are in printed circuit board and IC substrates, and this is something that we acquired with the Orbotech transaction. It will become more and more important because some of the advancement in advanced packaging will become a substrate and panel level, and we can leverage at that point, our presence in the PCB market as well. Didn't change the organization. It's been stable for a few years, so you can feel, you can see KLA is really a combination of three different business groups. One is our core business, semiconductor process control. Ahmad manages this organization. This is our inspection and metrology for wafer front-end fabs. Then we have a service organization under Brian, and, my organization, the spaces across the additional spaces, not really core semiconductor process control in wafer fab, but mostly packaging, components, PCB, substrate, and the specialty semiconductor process with the acquisition of SPTS. Okay, now let me talk a little bit about market drivers that are going really to lead into packaging and why it's so important and so critical these days. So first of all, one thing that is absolutely a change in the semiconductor demand is diversification. I put this slide together actually four years ago, and it becomes more and more true with all these, big emphasis on AI and GPU and HBM, everything that is connected. So when you look at the stagnation years, that I would say they were like after the smartphone introduction, until probably when the first data center and cloud and the hyperscalers started to invest in semiconductor, there was like a decade that the semiconductor industry was not really driving fast growth. It was a time that we said the semiconductor was growing as a GDP, probably semiconductor capital equipment, GDP plus, but no more than that. Now, nobody, I believe, in this room has any doubt that semiconductor will grow and semiconductor capital equipment will grow much faster than GDP in the next five, 10 years, because the huge infusion and pervasive participation of semiconductor in everyday life, and it's all about diversification. And on top of that, of course, AI is the big driver. So I tried just to put together this chart to show how different the GPU package is between 2015 and 2024. So of course, the B100 chip, the GPU, introduced a few months ago, and this is not enough because Jensen has already introduced the next generation of GPU, last week, and you can see the difference. So it was just the memory. Memory. It was 12 GB, and now we have 192 GB done in HBM. HBM, High Bandwidth Memory, means the memory that are stacking on top of each other. Nothing change in the wafer fab fabrication of these DRAM versus a standard DDR DRAM that goes into the PC or smartphone. The secret sauce is in packaging. So the way our HBM differentiates itself versus the other DRAM, chips, is because in the package, you need to stack all these DRAM on top of each other because you need a lot of DRAM together with the GPU in a package, and you need to be on the same package because you want to have a proximity between the DRAM and the processor inside the same package. That's what HBM is all about. We will talk about HBM, HBM, but, from a wafer fab point of view, it didn't change much. What changed is the way how you package the HBM in the, in the wafer- level package assembly line. And you see very, very stunning difference in terms of, the area. So we move from 2 by 800 mm sq. Of course, we are now surpassing 200 billion transistors in a single device. Memory tab is different, the size, the package type. Of course, this is another big, big change. Everybody's talking about. If I look at the buzzwords, now AI is the number one buzzword. Everybody talk about AI. And then when you go one level down, what are the other buzzwords? One is CoWoS, one is HBM. And by the way, HBM is integrating into CoWoS. CoWoS is a real package. And this is what is limiting the capacity of GPU right now. It's not the wafer fab. It's really the ability to stack all these HBM, ship to TSMC. TSMC is packaging on CoWoS. CoWoS package, and then the entire package get assembled generally through OSATs like Amkor, ASE, SPIL, and so on. Of course, as I said, there are many things happening in the entire AI device. So starting, of course, the GPU needs a very advanced design from wafer fab point of view. We talked about memory that gets stacked in packaging, and eventually, the cores that put all this together. And when I look at the momentum in AI. And by the way, we are really at the tip of the iceberg right now. Think about AI getting all this press, all this CapEx spend, and we are talking about cloud AI. We are talking about really AI in the hyperscale, in the cloud. But AI will be implemented at the edge or in hybrid devices in the future. You will get a ton of demand for AI devices and eventually requiring a lot of semiconductors and a lot of advanced packaging. So this is what we are betting right now in KLA. So semiconductor is going to grow. We are in the right industry, and we have some other segment of this industry that were very, very small, like packaging, that is growing even faster than the entire semiconductor market. Okay, let me go through a little bit of technology slides here. So now you know the driver. I'm talking mostly about AI, I'm talking mostly about advanced packaging. But before advanced packaging, 'cause I've been in this industry for a long, long time, I've seen so many technology, not scaling. My first job was one micron product engineer on a DRAM fab 32 years ago. One micron! Now, we moved from micron to nanometer. Now, we are moving angstrom very, very soon. So we see really how pretty much the technology was able to invent itself and make huge progress, just scaling the density of the devices and the number of transistors. And this is what Moore's Law was. So how we can pack double number of transistor in the same piece of silicon every 18 or 24 months. And lithography drove all this. But at a certain point, lithography started to slow down and becoming more expensive. EUV scanner is a state-of-the-art tool, and the High-NA EUV definitely is going to be the most incredible product a human being has ever produced. But it's not enough anymore, and it's too expensive. So people are thinking more and more ways how to deliver the performance at the required power. Because it's not only performance, it's not only computing. As Lisa Su said many, many times, the NVIDIA CEO or other important players in this industry, the computing got to come together with power consumption, because power consumption may become the biggest enemy of computing, a roadmap in the future. So you see, on top of lithography scaling, that is happening with the EUV or High-NA EUV, we see transistor architecture changing. So we have seen the transition between planar transistor to FinFET. We will see gate-all-around coming. It's coming already. We will see other transistor architecture later. The way how we distribute the power, the so-called backside power delivery network right now, is pretty much in the roadmap of the most advanced customers. The way it works is instead of delivering the power on top of your transistor, you deliver from the backside of the wafer, saving space, efficiency, and eventually consuming less power at the device level. And then, of course, the topic of my speech is packaging, how you integrate multiple functions coming from different wafers on the same package in a cost-effective way. And this is what heterogeneous integration or chiplet is all about. Okay, I'll skip this. Just to, I want to make sure that on top of packaging, of course, the semiconductor industry is progressing well on front-end as well. Packaging is complementing whatever the front-end wafer fabs is doing, a lithography level, a transistor level, and the power distribution level. So let's talk about packaging and all this vibe around heterogeneous integration. So many years ago, there was a concept called SoC, system-on-a-chip. So the big CPU producers at that point, they figured it out, they say, "I can have multiple functions on the same wafer, on the same chip, and everything is getting connected each other." The problem with this approach is you were building a 3 nm wafer, for example, with some functions like control logic chips, that they don't need to be a 3 nm. So why you are wasting 3 nm wafer space on functions that don't need to be a 3 nm? They can be cheaper. So the idea about the heterogeneous integration is, it's two ideas really in one. One is, I can have a mass cost, cost-effective way to integrate multiple functions in packaging instead of in a wafer, number one. Number two is, because of the computing and power requirement, I need all these functions to be very, very close to each other. This is what generated the need for the so-called heterogeneous integration. Putting more functions of a chip inside pretty much a package. Building on a different wafers, and then cut the wafers, and then building this Lego block that people call chiplet in packaging. And we have seen many of examples already. All the CPU and GPU right now are made with heterogeneous integration packaging, the most advanced one. There are many, many ways to package multiple chips at the packaging level together, and from low bandwidth to ultra bandwidth, depending on the applications, depending if you are stacking, for example, DRAM on DRAM or SRAM on logic, or logic on logic. There are multiple integration schemes of these heterogeneous functions in a package in a wafer- level packaging architecture. Let me give you a couple of examples. One is what we call 2.5D. That is, of course, a CoWoS package. This is the NVIDIA chip, goes into CoWoS packaging architecture. And then I'll talk a little bit about 3D hybrid bonding later. And eventually, the way how the packaging technology roadmap is evolving is to get all these two together. So the next generation of packaging architecture will have a 2.5D configuration with 3D hybrid bonding on top. So even, there are so many flavors of CoWoS today that are going to that direction, and eventually, they may find application not only in the very, very expensive cloud, high, high performing computing chips, but also in mobile in the future with different flavors in PC and so on, whenever the AI is going to implemented on the edge. So that is why the beauty of this packaging technology roadmap is we are just at the start. When you talk about CoWoS, CoWoS is just a start. When you talk 3D bonding on HBM memories, is a start. There are, infinite number of, potential combination of heterogeneous integration architecture in packaging that can be done in the next five, 10 years. So this is the 2.5D here. Of course, you see the HBM on top of each other, connected with the bumps, and then you see the GPU landed on a silicon interposer, and the silicon interposer is landed on a substrate. I'm not talking about substrate today much, but as I said, the substrate will become an important component of packaging, and substrate is nothing else than very advanced PCB. And now you go back and say, "Why KLA invested in Orbotech?" Well, at least we felt that the PCB may evolve in something more technologically advanced. In packaging, we were right. It didn't come yet, but we believe the substrate will become more and more important next, in the near future, and is going to be much better growth engine for KLA as well. For now, we'll talk about what is happening on top, okay, the substrate. And of course, you have the big ball connected to PCB. And when you look at 3D packaging, now you talk about two other names. One is Foveros Direct. This is what Intel is trying to build in their foundry market and foundry supply. So this is a big bet, and Intel, of course, is playing to become a foundry, and they become a foundry if they are successful in delivering this particular package, is called Foveros Direct. It is a 3D integration with hybrid bonding. No bumps, but copper-to-copper direct bonding. And then SOIC, of course, is a packaging architecture that TSMC has already built for some premium chips for AMD. So this stuff is already in the market, a very limited, limited, limited volume, and is going to grow exponentially if the market will demand more computing at power in the future for AI. So this is the case where you can see the 3D. You don't see bump anymore in this upper part of the graph, and you see chiplet connected to silicon, and eventually, in this case, copper-to-copper bonding, die on die on die on wafer. Many challenges, and this is where KLA plays a role. Let's start from inspection. I remember four years ago, I was talking to customers, and I say, "Hey, KLA wanted to enter the packaging business and inspection." And this guy said, "I don't need you. I mean, I need one micron defect sensitivity. KLA is so advanced, it is a front-end, no. And now we get pressured by the most important customers. They want 100 nm defect inspection sensitivity in packaging. They want 50 nm. Just to give an idea, how pretty much having tools from front-end, and of course, customized for back-end, because remember, the tools that you have in front-end not necessarily are good for packaging. You need to do a lot of work in customizing the handling, in customizing for the noise source, in customizing for warpage, thickness. So, so everything in packaging is different, is not standardized. In front-end semiconductor, everything is standardized. In packaging, it's customized. So we need to bring this capability from front-end, customizing for packaging, and we did it. And now people are looking for KLA because on these sophisticated type of packages, they need a front-end like inspection capability or metrology capability. That's one big requirement coming up in packaging. The second requirement is that is important for KLA in the sense that we not only have a process control, as you know, we bought SPTS here in the U.K., that I'm very, very proud to manage in my group. And SPTS is not an inspection metrology organization, is a PVD, CVD, and etch organization. And the good news about SPTS is we don't bring solution from 3 nm that are too expensive for packaging in that particular field. We customize and we build the solution for packaging. So our plasma etching tool, or our plasma dicing tool, is number one in the world because it was developed exactly for the need of packaging technology roadmap. That's the reason why you see a lot of challenges here, and KLA is working all these challenges, inspection, metrology, but also process challenges, like etching of silicon or plasma singulation of wafer, and so on. As I said, subsys is going to be the next engine for growth. Right now, this is what we did with Orbotech acquisition. We see a little bit of growth momentum there. I believe the real momentum will come in the next few years on the subsector, and panel type of inspection and metrology. Okay, I have a couple of slides to wrap this up. Again, as I said, a lot of challenges with the new architecture of packaging at the heterogeneous integration base, and we have a full suite of products, a process tool from SPTS on the wafer side, a plasma etch, dicing, CVD, and PVD. On the panel side, we have photolithography tool based in Germany, actually. This is another company we acquired under the Orbotech financial transaction in Germany, Jena. Of course, we have all the inspection and metrology tools coming from semiconductor front-end, customized for packaging or something that we developed in the last four years properly for packaging. And not only, another thing that is important about KLA is when I want to... I have been exposed to this company for a long, long time as an employee and before then, as a customer. I believe KLA, if I want to define KLA, I would say KLA is a data company. So we produce an insane amount of data out of our inspection and metrology tools. Now, the question is, what do you do with the data? Many, many years ago, KLA invented a new way in semiconductor wafer fab to analyze, collect, analyze, and manipulate the data in the wafer fabs. And 95% of the fabs in the world use our data analytics hub we call Klarity. And the beauty of this is, all the data in the fab, regardless if this is an open architecture software. I don't care if the data come from, this software doesn't care if they come from KLA tool or, or competitive tool. They get integrated, connected in our data analytic hub, and then eventually, you can produce a feedback correction loop that can improve the process, based on the data you collected from the inspection metrology tool. It's a feedback, feedforward control loop. So we are doing this for packaging right now, and I gotta tell you, there is a huge enthusiasm to have the same capability that KLA developed in the front-end wafer fabs now driving data analytics and correction loop in packaging. It's a massive opportunity because, as I said, packaging is not standardized, and there is no concept of really monetize, and materialize, and capitalize on data, and we are building this infrastructure right now. So not only tools, but also developing data analytical software and algorithms and so on. And that's my final slide, and I think speak by itself. This is what we are forecasting this year, revenue packaging. Huge leap! So you can see we are almost doubling the revenue in 2024. We just gave... Actually, four weeks ago, it was $400 million, and then in the last four weeks, we got a lot of orders. And then Brian, Kevin, and I were talking about, or maybe we should say, pretty much keep updating, because in reality, especially for silicon interposer and CoWoS, a heterogeneous integration architecture with HBM memory, there is incredible appetite right now for demand and, of course, for demand of capital equipment to develop these kind of packages. We expect pretty much to land in the $450 million-$500 million revenue this year as a packaging revenue for entire KLA. This is my last slide. That's it. I mean, amazing timing. It just clicked zero, so you're an expert. Yeah, I didn't check. I appreciate your time. Thank you very much. By the way, thank you very much, and again, I'm very, very glad to be here. Last year was a different topic. Actually, last year I talked a little bit about silicon carbide in automotive. That was a huge wave last year, and now it's kind of flattening a little bit. Packaging is the new one. Probably next year, I'm going to talk about something else. Thank you. Appreciate that.