Welcome to day two of Citi Global TMT Conference. My name is Atif Malik. I cover U.S. semiconductors, semiconductor equipment, and networking equipment stocks here at Citi. It's my pleasure to welcome Mike Plisinski, CEO Onto, as well as Sidney Ho in IR from here. I'm going to kick it off with a few questions, and then I'll open it up to the audience, and if you have a question, please raise your hand, and the mic will come to you. Welcome, Mike. Thank you. Mike, before I get into the nitty-gritties of HBM and AI and Intel and- Yeah WFE and all that, you know, I think I feel like this wave of AI has created a new breed of semi caps that historically were more small cap, but they're benefiting quite a bit from the secular trends in AI, particularly on the back end in advanced packaging, and you know, stocks like Onto, Camtek, Nova, you know, these stocks have become very interesting to investors, and that's why you're at this conference. So I want to give you an opportunity first to for the audience who are not so familiar with Onto to kind of walk us through you know what markets you participate in and what waves of secular drives that you've been riding right now. Sure. I think if you look at transformative time was when we merged with Nanometrics. So Rudolph and Nanometrics come together. Rudolph had been very strong, had historical and still maintains a position in the front end, primarily for acoustic metrology. Kinda nichey, but very strong in specialty semiconductors, so RF filters, MEMS, compound semi, power semi, that you hear about a lot now, as well as advanced packaging. That's where we really had the strongest share, the strongest, broadest portfolio. When we merged with Nanometrics, that expanded our portfolio into a much broader position in the front end, the advanced nodes. We also expanded into the bare wafer, so the substrate manufacturing and the wafer front end, ahead of the advanced nodes, and that allowed us to support the entire value chain with process control. So a few years ago... Why that's important is we can ride the different waves of growth. So a few years ago, EUV started to really drive adoption, and we saw the substrate manufacturers investing in our process control for, specifically for EUV wafers. We got $120 million in new orders just from a particular product line. So that kind of. And now the big wave is AI, so advanced packaging and how that's enabling, for instance, NVIDIA, to create this, you know, high-performance device, which is really only built on, I think, five-nanometer, seven-nanometer technology. But how they package it and bring in the memory, in the HBM memory, which we supported seven years ago with some large orders to Hynix back then, that's the benefit of a company like us. And I'll say one more thing about that, if I can. The portfolio we have is also synergistic. So we're serving this broad value chain, looking and finding the different waves of growth, but then when we see a wave, we have synergistic portfolio, inspection, metrology, and software, so all tied to process control mission that can apply to that wave of growth. So I think that makes us kind of interesting for a company of our size. Can you also break out optical inspection and then other areas in terms of percentage of your portfolio? What does it look like? Well, it changes. Right now, optical inspection is a much higher percentage before. We don't break that out as much as we do the markets, the end markets we serve. So advanced nodes, where we have about 30% or so, 25% to 30%, it was as high as 55%. And then specialty and advanced packaging is the other end markets. And, within that, we have the portfolio, as I mentioned, the inspection, the metrology software. Right now, though, roughly to answer your question, I'd say inspection is probably over half the business, metrology, you know, less than half, and then lithography is in there as well. But we, we look at it more from the different waves of growth, what our entitlement is on that wave, and then getting all the products on that, on that wave. Then some competitive landscape, you know. KLA is obviously the biggest player on the PDC side. And who are you competing most against in the leading-edge and trailing-edge segments that you're participating in? For the front end, the leading edge, it's mostly KLA, and that's on the metrology side, and then, we're seeing more opportunities on inspection, particularly outgoing quality assurance. So that would be clearly KLA. On the packaging side, KLA is trying, making big attempts to get into the market, and they have some small positions, but the primary competitor would be Camtek. And what makes you believe that the re-rating we're seeing on the back end in inspection metrology with the is a permanent one? You know. That's a great question. So for us, that's been the case for a long time. We've recognized the importance of advanced packaging for decades. That's why we've had such a strong leadership position, particularly with the large IDMs, where about, I don't know, around the time InFO was launched, it became very clear that packaging was the next wave for the IDMs to drive performance, cost-effective performance advances in their chips. Something the OSATs just didn't have the ability to invest in at that scale. So InFO was the wake-up call, then we saw several others follow. We saw HBM from Hynix back in, I don't know, seven, eight, ten years ago. That was the first 3D stacking from there. So packaging has, to us, been long recognized as a technical enabler. It's why we invested in lithography for packaging. So not only are we doing the process control, but now we're helping to develop the processes for next-generation packaging, and that gives us even more capability and importance in that market. So as far as a re-rating goes, I would say it's just being recognized more broadly, how critical packaging can be for the industry, especially now. I think the next big wave we all see in NVIDIA, but the whole chiplet architecture, the ability to mix and match die and to optimize the transistor structures per node, where they really are gonna gain the benefit instead of wasting all the silicon and back-end alignment circuitry that's not gonna benefit from a three-nanometer node. That's going to enable a whole wave of new architectures and chip constructs that, you know, will all depend on packaging. Great. Let's talk about the market outlook. I mean, you guys... I don't know if you guys provide a WFE number, but you probably see all the same end markets that your peers see. But, can you just talk about your outlook for this year and particularly in second half, and if you've seen any impact from the Intel CapEx cut announced in early August, as well as maybe there's more downside to that? Because Intel was at a conference yesterday, and they talked about that they have taken their 2025 CapEx down by $10 billion. We do not know what the new number is, but at least they gave a reference. And also on Blackwell delay, if you've seen any impact. So starting in the top, the WFE, you're right. We don't really correlate or chase that number so much, so I would just be repeating, you know, what others see. From the second half, though, we do see growth. We've talked about that, and it's coming from the advanced nodes, all three. We're seeing some, but again, from a small base for us. But spending in memory NAND, sorry, DRAM NAND, as well as the advanced logic, and then also packaging and some power semiconductor revenue, which has remained very strong for us. So for us, second half still looks very, very healthy. The impact from Intel remains to be seen. There's some movements left and right, you know, a little bit push out, a little bit pull in. We'll see where that all ends up. For us, I'm a little less concerned because we're so tied to the advanced nodes, and if they're gonna spend any dollars, I'm expecting it to be where they're going to add competitive differentiation, and that's gonna be getting to the Gate-All-Around node as quickly as they can, and their advanced packaging, which they have some very good packaging technology. So I would expect those areas to benefit from any spending, which will benefit from us. And the last one- The NVIDIA Blackwell. NVIDIA Blackwell, thank you. There I have not seen any impact. If anything, it's more public about the yield and the challenges with some of these advanced packaging technologies. We've talked about, you know, having customers mandate more of our process control to help drive yield. So if anything, I see the process control intensity continue to go up. We haven't seen, you know, anybody pulling back orders and just waiting for Blackwell to come out from NVIDIA's own statements, so it looks to me like things are moving forward pretty nicely. Great. Let's start with the Gate-All-Around on the leading edge. What's the incremental capital intensity for you compared with, you know, versus FinFET when you move to Gate-All-Around two nanometer? Maybe you can talk about the number of steps that grows for you or any kind of indication you can give us, and any kind of revenue expectations from Gate-All-Around this year and beyond. So from a capital intensity perspective, we've always said that our technology, our OCD metrology technology, differentiates itself further, the harder the measurement is. In the case of gate-all-around, there's a completely new transistor structure versus just a smaller FinFET. It's a more complex structure with many more measurements required. We get benefit from two things. One is share gains, 'cause as I mentioned, the harder it is, the more differentiated our product is, so we get some share gain. And then also, the amount of metrology required for gate-all-around goes up. It goes up, I don't know about double, but it goes up fairly significantly because of these APC layers. The automatic correction layers goes from two to about four to six in gate-all-around, so two in FinFET. That's important because it means the tools are being used to automatically adjust the process equipment, so you have to measure every wafer. So that drives utilization up. So why I hesitated, because our tools are much faster. So the next generation Atlas V is significantly faster than the Atlas III, and so roughly we estimate about a 30% increase in capital intensity for OCD. In addition to that, though, we've also been successful bringing our Iris planar films platform into the market, and we've been successful winning share in both advanced logic, so for gate-all-around, as well as DRAM processes. So that's completely new. That's a market that KLA has had for, you know, uncontested for many years. And we've made some, you know, nice progress there. All right. Moving to AI packaging, now, why did you guide a half or half decline in second half, and what gives you the confidence that there'll be re-acceleration in first half of next year? Comments about yields certainly helps. We had to look at the reasons. So why are we seeing this decline? Customers just can't. They, they've filled out as many facilities as they could scrape together to catch up with the demand, or try to catch up. They haven't, and they've just run out. So both with DRAM manufacturers, HBM manufacturers, as well as the logic player, it's been pretty public that they're facility constrained. They've had various issues trying to open up new facilities. So for us, we look at that reason, we look at end demand. End demand's still strong, and we hear from our customers, and we're very confident that that will re-accelerate in the first half as the new capacity comes online. We, you know, we didn't see a fall off, we saw a dip. We saw a dip because of the facilities. Mike, do you have an outlook or a tracker on CoWoS and HBM capacity growth for next year and beyond? And are there concerns about overbuilding capacity as other memory makers jump into the market? I think with DRAM, you always have to or with memory, you have to worry about overcapacity. Every time we think that that's not gonna be the case, you know, another example happens. That being said, the demand for HBM continues to rise. We see the even the new architectures, whether it's from NVIDIA or from AMD, continuing to expand, not just in layers, you know, the roadmaps for a higher stack, but also the number of HBM around the devices. As these chips become, let's say, higher yielding and let's say, more cost-effective, we expect new applications to adopt them, further expanding the benefit or the need or the demand. So I don't foresee, at least in 2025, any big correction. But of course, we worry or we watch. We look at all the expansion that's happening. We're looking to see, you know, if only one guy is winning the war, that means there's some excess capacity with the other players. So where's that gonna go? How's it gonna get picked up? So far, we're not overly concerned, but it's something we watch. Then, we had KLA here yesterday, and I asked them about advanced packaging, and you know, their view was that you know, that their customers in advanced packaging want, they want the bumps and micro bumps, everything is getting kind of smaller. And you guys have been the incumbent of the back end, and I want to give you an opportunity as well in terms of, I mean, how do you compete with with you know, KLA and Camtek on on AI packaging, and is there something different about back end, maybe pricing structure or or you know, defect kind of specs that put you at advantage versus some of the larger players? I think there's several. So it's not the first time KLA has been focused on packaging. We can go through that history at a different time. I think there are several areas of packaging that make it different than the front end. One is just the metal grains. So yes, things are getting smaller, but they're also very noisy. So the algorithms and the techniques to filter out that noise, reduce the noise, and see the actual defects of interest, is not just about resolution, 'cause that, 'cause that would accentuate the noise... So it's about all that other technology. So that's one thing. The other is just the wafers themselves. In the front end, they're very crisp, and they're clean, they're easy to handle. In the packaging area, they're ultra-thin, they're like potato chips, they're warped, they're hard to chuck down. Just the automation itself, the pre-alignment, there's a lot of technology that goes into just handling back-end wafers on film frame. I mean, there's a whole, there's a whole slew I could go through. But the other big thing that is different is, in the front end, you have kind of purpose-built tools. In the packaging area, in particular, they especially with, let's say, foundries or some of the high mix, even high volume, but high mix, they have different needs depending on the product, different types of metrology or inspection they want to do. So our tools become Swiss Army knives. They're not just an inspection tool. Our Dragonfly contains ClearFind technology, which to date, no one's been able to replicate, contains special 3D metrology, contains the subsurface defect, so looking at defects buried for chips and cracks. We look at the edge of the wafers, so just the very edge, for defectivity that could migrate the backside, et cetera, et cetera. To replicate all that is not insignificant. For sure, there are applications right now where KLA's high resolution is an advantage. They're cleaner, more specific or niche applications around interposer, but outside of that, there's a lot to do, and it's, in my opinion, and we'll see over the c- how this competition plays out, but in my opinion, and we believe it's gonna be much easier for us to address that gap and maintain and leverage our massive install base than to replicate all that we have. Specific to Camtek, Camtek is primarily focused on 3D. I don't know if they're focused there, but where we see them or where we see opportunity is in 3D. We don't see them yet in the 2D space. I know they have a new tool. I haven't seen it yet, so we don't know anything about that. But the 3D tool is where we see opportunity. Customers have been concerned about the shrinking bumps, the ability for the technology from their incumbent to scale to support those shrinking bumps and the volume of bumps, and that's where we've released the new 3D sensor on our Dragonfly. Again, another capability in the Dragonfly that, well, as we've been proving, as we're running samples for our customers, we can run, you know, four-micron height structures, 250 million of them, very, very fast. So- Moving on to hybrid bonding, when do you think hybrid bonding will be adopted for HBM and logic, and how will Onto's opportunity change with hybrid bonding? So I think it looks like a, you know, 2026, 2027 timeframe, HBM4 or HBM4E, probably HBM4E is my guess. But, for us, all the inspection metrology, the applications we do today, will stay. We don't expect any changes there, going from the current copper pillar to hybrid bonding. The change will be if there's no bumps, there's no 3D, so that's a potential change. We're starting to see them potentially interested in measuring the actual bond pads, and they can do that on our system. But outside of that, we see opportunities for void detection, so very, very critical. In fact, I was just visiting my team in New Jersey that's building the new void detection tool. We had customer in there for three weeks working on that tool. Very interesting. Any small void we thought was tied to, let's say, electrical problems, no, it's actually any small void, they're concerned will, with the compression of the next wafer on it, create a crack, creating a weakness point that would create a crack, which is much more significant yield issue as that crack then propagates. So the void detection is absolutely critical. That could be a very, very high-value problem and a 100% inspection-type opportunity. So, you know, that would be new for hybrid bonding, and the other is the surface metrology of the bond pads. That would also create some new opportunities for us, and we have a variety of technologies we're looking at to see if we can solve that issue as well. Great. Let me pause here and see if there are any questions in the audience. If you have a question, please, raise your hand. We'll just keep going. Mike, moving on to the panel-level packaging, what are you seeing in terms of timing for adoption of panel-level packaging, and will that coincide with the adoption of, glass substrates? Good question. Actually, panel-level adoption is here now. If we look at the server market, enterprise servers, it's going back to 2022, Lisa Su, Intel, they were all talking about being capacity-constrained by IC substrates. Those are large panels. Their high-end chiplet architectures are being supported by panels today. I think the transition to glass will enable the next wave of innovation or technology advancement because it'll allow for much smaller interconnects, and it'll be a much more stable substrate to process on. Currently, the panels used today can support maybe five microns. Our system can support three, so from a stepper perspective, we can go down to three, but we're not seeing anyone at even five yet, and the instability in the substrate makes us think that even three is gonna be a stretch, which is why we invested so much in the glass technology. 'Cause we're believers the market's not gonna stop. The need for panel is very clear. If you're gonna combine a bunch of chiplets together, that package is gonna be bigger, and processing it on a small wafer is just too much waste. And so moving to panel is the clear way to enable the chiplets. But then also you hear about large die. Some of these GPUs, some of the Tesla technologies are very, very large die. Again, processing that on panel is where it makes the most sense. Great. Um- Oh, timing. Timing, I think, you know, we just shipped the first glass tool in June. Based on customer roadmaps, we think maybe kinda 2026, 2027 also. 2026 might be a little early for high volume transition to glass, but maybe 2027, more realistic. Sure. And then on the memory side, excluding HBM, are there any signs of recovery for, you know, the traditional DDR5 type memory or even NAND? There's pulses. I don't know about signs of recovery yet. So from DRAM perspective, customers are optimistic. The signs are out there. The inventories are coming down. ASPs are going up. Utilizations are going up. So there's positive signs, but the customers I speak with seem very conservative in when and how they're going to expand. I think the growth in HBM has also helped because it's taken up so much of the excess capacity from DRAM. So if there is a DRAM demand uptick, the investment cycle will be probably bigger than it would have been without HBM. So that's a positive. NAND, the uptick we're seeing is around the high stack 3D NAND to support, frankly, AI devices, so to support the create the solid-state drives to coincide with those servers. So we are seeing that uptick. That's particularly good for us because we have some unique IRCD metrology that's specifically designed for high-stack 3D NAND. Some very, very critical parameters need to be measured and can only be measured by this tool. It's been qualified now at every single NAND manufacturer, so if we do see a prolonged, sustained adoption of the high-stack 3D NAND, you know, we should see an uptick, not just from OCD, but also the adoption of Aspect. Okay. And can you remind us about your China exposure and what demand trends are you seeing in China? For us, our China exposure is quite light, maybe 15%, 10% to 15%, and the bulk of our focus has been specialty devices. Where we can provide that portfolio of process control we talked about, we can sell inspection, metrology, software, but leading with the acoustic metrology, which is very relevant to those customers, and not replicated anywhere. You can't find that technology anywhere else, so we can put together a portfolio that helps them ramp, drive the yield. We have the applications experience in those markets to help them grow. Primarily, when I say specialty, in this case, for China, it's been a lot of power semiconductor. GaN, silicon carbide, even some silicon, that's where we've seen the most growth in recent years in China. Of course, we're looking at mature nodes and looking at some of the areas that we had not focused on, but, you know, a lot of the tariffs and a lot of the restrictions really impacted us perhaps more than others. All right. Moving on to the target model in June of last year, at the Investor Day, you talked about key growth drivers to reach $1.8 billion- $2 billion revenue target. And what are some of those key drivers that can get you to that revenue level? That's a lot of the ones we've spoken about. So, we talked about advanced nodes in that model, the adoption of gate-all-around, and in there was and buried in there was the planar film. So this whole additional SAM opportunity, close to $1 billion, you know, $800 million or so, of new SAM that's tied to advanced nodes, and that, that's a part of the growth story. We're about still in the early days, 10% penetrated. 20% to 30% would be good if we start to see the adoption growing, and that, that adds significant amount for us. So that's part of it. The other is advanced packaging. We didn't expect this, this huge ramp in AI packaging, so, you know, that's, that's on the upside. But panel packaging was something we expected to see, and we still do. And in fact, if anything, we're more excited about panel packaging. And then for us, that's not just about the lithography, but also the Firefly, which now has all the capabilities of Dragonfly. So we can bring all that learning from the wafer packaging side right directly to the panel customers. And where several of them are migrating from wafer to panel, it's a really, really powerful value proposition. So I think panel is another big one. And then the next, the last in that model was the power semi, which though EV is a little bit down right now, I think the electrification of everything, I think the, the need to more efficiently use power, even in the server rooms to support AI, the demand is clear, and it's secular, and so our position there continues to grow. Now, where the market's been pretty down, we're still talking about near record levels for our power semiconductor business, and that the record was set last year. But we're close to that level, primarily because yields are so poor, and again, that portfolio, synergistic portfolio, is being well adopted by power semiconductor companies around the globe. So Europe, U.S., Japan, a little bit Korea, China, so pretty broadly adopted. So those are the three primary drivers. What's the path to the mid- to high-fifties gross margin? Blocking and tackling. It's primarily, you know, from the merger, you had two companies that didn't really have processes, even for the $300 million revenue businesses that they were. Then we merge, we double, and then we double again. The processes weren't scaled up. So what do I mean by that? Supply chain management, strategic supply chain, bringing together, unified designs, things like this. So we've been working on that really hard in the last couple of years. We've made a tremendous progress. We talked about $25 million in savings- Hmm ... last Analyst Day. We're on track for that. There's additional savings we're going to drive, in both the cost structure of our lithography tool, there's some design work. Those have all been done, and now we're working to cut them in. Customers obviously want to keep. If they bought a line, they want to replicate, so there's some timing issues with cutting it in, but new customers get all this advantage. And then the commonality. So we've implemented a common EFEM. We're starting to roll that out in 2025. There's savings there, not just on the EFEM itself, but also in the support costs associated with it. So when you add all that up, that's how we're going to get into our model. We've said the model, you know, the mix when we defined the model three years ago has certainly changed, but we're not using that as meaning advanced nodes has come down. Advanced nodes is certainly gross margin accretive, but the efforts we're doing are meant to mitigate any kind of mix shift. So that will be in our model, more or less, regardless of mix. Okay. Can you talk about your M&A efforts, need for any tuck-in areas or in general, consolidation in the PDC space, is there more room for the PDC sector to get more consolidated? I think there's more room, for sure. For us, all of our growth, we have tremendous. We're not tapped into all the growth opportunities our portfolio affords us. So we have a tremendous amount of organic growth just with what we have. But we're also generating a lot of cash. We have no debt, so M&A is a very, very important aspect of accelerating or enhancing that growth, and where we focus on is the synergistic portfolio. So not just inspection metrology. Lithography has been a game changer for us, at least from a relationship with customers. Why? Because it leverages the core competencies in software and optics that the company has, but also it's synergistic with the process control. So we look at new process control technologies. We're always looking there. So that's one area for M&A focus. But you could also imagine process equipment that would benefit from our process control, and tighter integration would also be a strategic synergy for us. So I think the challenges are tied to our gross margin. We don't want to be dilutive to the business that we have. We want to make sure as we add these capabilities, they're enhancing our financial performance as well as the strategic fit. So that makes it a little more difficult, but I definitely think there's opportunities to be had. The pipeline has continued to grow really well. We're an attractive place for companies to land based on our track record, going back to even the Rudolph days. A lot of those companies still flourish, and they're part of our capabilities today. So I think we get people coming to us. Great. We're almost out of time. Mike, thank you for coming to the Citi conference. My pleasure. Thank you for inviting us. Thank you.