Right on. Okay, great. I would like to introduce Rambus, a leading supplier of memory solutions and IP, and notably a key player on x86 CPUs into AI data center. We're pleased to have with us today Sumeet Gagneja, Senior Vice President, Chief Financial Officer, and Matt Jones, Vice President of Strategic Marketing. With that, let's get started. Gentlemen, good morning, and I think you have a few slides for us. We do, thanks. Good morning. Sumeet Gagneja. Just before we jump in, quick reminder, today we may be making forward-looking statements which are subject to risks and uncertainties. I refer you to our filings on the SEC on that. With that, let's jump in. We're Rambus. We are a fabless semiconductor company, and IP company. We have three distinct product business lines. One is our product with the semiconductor product business, which is anchored around our DDR5 RCD chips, as well as companion chips like PMICs, power management chips. That part of the business has been growing 25% CAGR over the five years, and last year it grew 40%. It's smack in the middle of data center compute build-out, and the infrastructure build-out. That's where our products play. The second line of business is more around the silicon IP business, which is primarily focused on interfaces for HBM, the high bandwidth memory, PCI Express, and security IP. That business is around $125 million last year and growing 10%-15% in that range. Our third part of our business is our patent royalty business, which is roughly $200-$220 million per year, and that's 100% margin business. If you put it all together, we have a very strong financial model, which generates revenue growth from all the three aspects of our product lines, our business lines, as well as we have high gross margin at the total company level. If you put it all together, 78%-82% margin for the full company, and our operating margins are around 45%, so we generate a lot of cash, which helps us to invest back into the business, both organically and inorganically. Yeah. I'll take it from here. As Sumeet mentioned, we'll build this back up from the bottom up. The three ways we go to market. At the bottom, foundational patents. Rambus was founded 30+ years ago on key technology for interfacing memory to compute in high-speed systems. We continue to grow that patent portfolio. That's been a core part of our business and foundation, in both revenue and cash generation, to build the rest of the business on over time. From there, we moved into silicon IP. This is where we build blocks of IP that we sell to ASIC, and more recently, hyperscale and cloud providers for integration into things like AI accelerators. We'll talk about the positioning of where that fits here in just a moment. Finally on top of that, our most recent business and the one that gets a great deal of attention in terms of its scale and importance, never as much as today as we're talking about the growing need for compute in AI and even more so as we get into agentic AI, is our memory interface chip business. These are the chips that sit on modularized memory in the data center. Just a brief view of where the products go from an IP and a silicon chip product. Tristan's going to be asking probably a number of questions here, to help visualize this. The silicon IP, again, these would be the elements that would go into something like an accelerator chip, a GPU, an XPU today. These are high-speed interfaces for memory like HBM, GDDR, LPDDR. The interface side of it would be PCI Express, CXL for connectivity. Importantly, for these accelerators and for the data that moves between the accelerator and the CPU is the security of that data. Both securing the data at rest on the accelerator chip, as well as the data in motion with things like IPsec and MACsec, is a security IP that's an important part of our IP business, as well as those high-speed interfaces. On the left-hand side, attached to the CPUs are the DIMM modules. These are registered DIMMs or RDIMMs in today's DDR5 generation, and growing into things like SO-CAMM2 for LPDDR. You see where our chips fit onto those physical modules that plug next to the CPUs. Finally, in terms of the expanding chip roadmap, we entered this space in the DDR4 generation, and have grown our chip portfolio across both DDR5 with the RCD chip, which has been the main contributor to our revenue growth. The PMIC, SPD hub, and temperature sensor, the companion chips we often talk about. You see a richer opportunity for us for things like SOCAMM2 into the client space where some of the technologies from the data center are now water falling into the highest performance compute AI PCs and the continued build out there. We obviously look forward with a roadmap and some of the investment that we'll talk about here this morning into DDR6 and other memory technologies as we see AI continue to grow and drive performance needs. With that, we'll turn it to Tristan. Okay. Thank you. For my first question, I wanted to talk a little bit about the evolution of the company. You had a big wave of upgrading from DDR4 to DDR5 that led to a significant content increase and share gain for the company. Now we're seeing x86 CPUs, which used to be a mature market, growing well in the double-digit driven by AI applications. If you could talk about how you benefit from those trends, obviously, given your RDIMM content, and what is the outlook now that AI and specifically inferencing is driving x86 really as a central part of AI? Yeah, that's a great question, Tristan. Certainly AI in general has been a catalyst for the adoption of DDR5 high-performance memory in general, in the data center, driving both our product content, and our silicon IP business as we see more and more accelerators being built by the hyperscalers. One of the important things that we do see as we move from training to inference and, in today's vernacular, really talking about agentic AI and later physical AI as we get into more AI applications, that inferencing exercise and the orchestration, the tools that get used in agentic AI, those are driving the CPU ratio that many people are talking about today, from the favor of GPUs to more in line with CPU to GPUs. The products where we have played historically, in DDR5, has really coupled well with both x86, and Arm-based, CPUs. More CPUs means more opportunities for our chip business. With the recent introductions of a SOCAMM2 chipset solution, we see the diversity of both DDR and LPDDR, as we see that CPU resurgence swing. It's something that we've been talking about for some time within the ecosystem, knowing that we would see the momentum shift back towards CPUs as we got into this space. We're very pleased to see it playing out that way, Tristan. Just continuing on those responses, do you think that that trend will be lasting? I know there is not any real CAGR yet multi-year for CPUs, how do you see that as obviously inferencing continues to gain traction? You have agentic AI. We know all the data sits on x86 CPUs in data center. Now with the SOCAMM2, you have a direct participation on the GPU itself. What are your view in terms of the sustainability of those trends? Yeah, I think that the durability is important to understand because I think one of the things that with agentic AI being the most talked about element of AI today, and specifically around the potential resurgence or growth pace of CPUs is I think we're in the very early innings of this happening. You look at some of the solutions that have been announced, especially in the Arm community. Arm's own AGI, for example, will begin shipping at the end of this year. Some of these solutions that are being talked about as driving us in this direction are coming. I think it will be something that does sustain. What I try to share with people is if we remember back in 2023, when we all started talking about AI, it was putting a GPU card into an existing server and you've got AI. We're at a place where there are racks of servers and interconnect and software. It's a system. Agentic AI is even more so going to be a system-based solution where you have many servers working together. I think it's going to take some time to build out, but it's a very exciting setup for CPUs, and you've hit it on the head, Tristan. It's very difficult right now for anyone to say, "This is how big we think it's going to be or what the CAGR is going to be," as we're in those early innings. It is right on the trend here, and I think we've all gotten more sophisticated in talking about this, which is why we're having a conversation about what's going to happen as opposed to what happened, as we did when AI took off with training in the first place. Yeah, just to add to that a little bit, right, in terms of you talked about the CPU volume growth, right? As compute needs drives more number of cores within the CPU, that's growing. To feed that, the number of channels are also growing, the number of channels per CPU. That all adds up to how we play into that market from growth perspective. I think as demand is very strong, driven by AI across the board, there's been clearly a lot of commentary on the last earning season about supply constraints at every level, whether it's substrates or obviously DRAM. How do you see those trends either benefiting you or maybe restricting the demand including for x86 CPUs and what have you done to get around and navigate this very tight environment? Yeah. I think we have mentioned, and some other companies have also mentioned tightness in the supply, especially for us, it's more on the back end with OSATs assembly and test. What we're doing internally is looking at a supply chain and making it more robust. We're looking at dual sourcing, long-term relationships, and all that. Like we mentioned, we have a strong balance sheet and generate a lot of cash. We mentioned that in our Q1 earnings call as well. We're very strategically building inventory to make sure we're able to serve our customers from their demand perspective. Okay. From a capacity standpoint, any particular steps that you're taking in addition to building some inventories? Anything longer term, any supply long-term agreements that you have to build into 2027, as it looks like the demand probably is not slowing down next year as well? Yeah. From our perspective, like I said, we're diversifying the supply chain. As we're looking at that, we are looking at also longer term agreements. Long-term relationship, I should say, with our suppliers on that. Yeah, I think, we're already well into 2027 discussions. Okay ahead of the planning cycle we would've been a year ago. I think that is something that's a trend as well there, Tristan. Okay. On the hyperscaler side, obviously, DRAM has drastically increased as a percentage of bill of material. How do you see the hyperscalers reacting to this trend? Is it fair to say that they get all the DRAM that they need, and really the supply bottleneck for DRAM will be outside of hyperscalers, and reminding the audience that you're primarily hyperscaler based? Is there any other variable that we should be considering, whether it's any shift in CPU mix or DRAM content as the hyperscalers try to mitigate those higher costs with what we're seeing from a supply standpoint? Yeah, Tristan, that's a great question. There's a little bit to unpack there. Thanks first and foremost for reiterating the fact that we are, as a company, with the revenue growth that we've seen, focused on the data center and the build-out of data centers and AI, specifically. I think what's been written about the most or talked about the most from other companies and throughout the industry is the pressure that we've seen from rising memory pricing, and DRAM specifically, has been more on the client and mobile side. Potentially, not only some pricing out happening there, but some specific comments from vendors talking about taking supply and putting it towards the data center, whether it's memories or CPUs. I think there's been a very deliberate effect. On the buy side, I don't see behavioral change with the hyperscalers. The build-out has been talked about as once in a lifetime, too important to miss type of discussion. While on the memory side of things, they're saying it's a set your price market. We've seen that largely those prices are being paid at this point. I haven't seen a great deal of choking off. Now, CPU vendors, memory does have an end to the runway, so to speak. As of now, we're seeing continued strength there, and the reaction you asked maybe is probably just swallowing hard and moving forward by the data center build-out folks. In terms of the other things that could impact this going forward, Tristan, I think we're very well positioned as a company for new players coming into the market. The rise of Arm CPUs, the shift in balance within the x86 players, all of those things are things that we've positioned ourselves well for. We talk about being mid 40% market share with the main chip in DDR5. That means we have a presence across the industry, and are well positioned for that. As you mentioned, the market share. A few years ago, DDR4, you had about 20% share, then you had 40%, now you're increasingly talking about mid-40s%. What's leading those share gains? What's the fundamental reason that's clearly company specific that is driving higher market share, and how sustainable is that trend going to be as we get into new products and also ultimately DDR6? Yeah, I think two things that give rise to the position we have and certainly give a backbone to why we think we'll be able to maintain it, are focus and execution. We have been 100% focused on our end customers in the data center and our chip business. As we went through the DDR4 cycle and through the pandemic, as we saw some shortages, we built strong relationships with our customers and taking every wafer we got and applying it towards the data center while some of our competitors may have had hard choices to make at that time. We've also executed very well, delivering quality products, and being ahead of the curve with early investment. The market share uplift from DDR4, where we entered the market, to DDR5, was all about early investment, working with our customers with those first chips and then continuing to work with them into each sub-generation or speed uplift of DDR5, continuing to maintain our leadership position there. We've continued to invest both in the specification setting, things like DDR6 within the JEDEC standards body, as well as that product investment that we talk about being 23%-25% of revenue in R&D to continue to drive to maintain that leadership. We worked hard to get to the front. We don't expect to stop the effort from being there. We look forward to coming generations. Great. You mentioned just a few minutes ago, Arm. NVIDIA has talked recently about a $200 billion TAM for their CPUs, including Vera, with lots of traction. Not just Vera Rubin, but standalone. How do you see the demand for Arm-based CPUs in AI? Are they all going to be based on LPDDR5 or versus x86 CPUs? How do you see that increasing mix of Arm architecture benefiting you? Yeah, no, it's a great question. Really excited about the rise of Arm solutions into the market. The diversity, the new flank of competition, I think has been exciting there. The smaller cores, different kind of architectures that they bring has been exciting for us. First and foremost, when you talk about the memory utilization to date, other than one vendor, NVIDIA, with their Vera solution that uses LPDDR and SOCAMM2. The rest of the field has continued to use DDR5 RDIMMs. In fact, the Arm community led the adoption of DDR5, and has continued to be a wide adopter of that. With respect to LPDDR, we've been very excited. Recently, we announced a chipset for the SOCAMM2 module form factor that gives us a very strategic and early play also into that part of the ecosystem. As we see the continued rise of CPUs, we're well-positioned with the growth in DDR5. I talked about some of the thought leadership just a minute ago as we look to the transition to DDR6. Also we recognize that LPDDR is going to have a strong place, potentially in the data center, and being a part of that is something we're very excited about. I think we're seeing the Arm numbers continue to rise. I think that's going to be a trend that we see for some time. Not only Arm, but also alternative processor architectures. Just a diversity of the workloads driving very specific needs in compute. When you said not just Arm, are you referring to RISC-V or? RISC-V becomes part of the discussion after some time. We've had a long life of x86. Now we see Arm. What's next? Is it RISC-V or is it something else? Just the natural evolution of technology in the space, Tristan. Any chance you could give us maybe a very quick outlook on RISC-V in terms of opportunities again for your product? Geographically, is it going to be more China-centric or any given that you are living and breathing directly in that CPU market, we're interested in your views on? Yeah that emerging opportunity with RISC-V. I think the key thing now is that where we are with SOCAMM2 and LPDDR, RDIMM with DDR, they're JEDEC standard products. Strong participation there. I think, whether it's RISC-V or an architecture to be determined out of the workshop someplace else. Over time, I think we've seen as an industry the importance of not only the supply chain, but the technology cohesion within JEDEC-defined standards being important there. Our goal is to have chipsets for all modularized memory. SOCAMM2 was the most recent addition. We'd be excited about the emergence of that. I think you mentioned the regionality of it. That's what we're seeing in the early days of RISC-V, is really a China-based solution for various commercial and technology reasons. Certainly an exciting development to come. Then, I think there was a view just a year and a half ago that you were not participating directly into AI GPU. Obviously, that's changed with SOCAMM2. Could you give maybe some background as to what happened? Initially there was SOCAMM and then now with that second generation, you're coming out of JEDEC and you have a solution that addresses issues that were specific to SOCAMM and what is the potential opportunity as you now directly participate on that GPU trend? You've talked already about having a next generation of product. What's your expected market share? What exactly are you solving with that incremental content? Yeah, that's a great question because I think SO-CAMM2 is really a fantastic example of the importance of the value that we bring to the memory space and also the importance of the standards body in that space. SO-CAMM or S-O-C-A-M-M was the proprietary solution that was a joint effort between some memory suppliers and a very large GPU concern out there. Unfortunately, and the goal had been to take the LPDDR that was historically needed to be soldered onto the motherboard and modularize it, because you were seeing memory failures in training runs that were very expensive in either swapping out the hardware, so the GPU-CPU subsystem as a whole, or, and also rerunning the training run. It became a very specific point of failure. The original SO-CAMM was to take that memory from the motherboard and modularize it. Well, that's difficult. It's more difficult than it sounds. The signal integrity and the power integrity concerns, the chips that we bring to the market, those are problems that are difficult to solve. It's putting memory, even through a simple connector, changes the entire signal perspective, the clocking, the power delivery, et cetera. With today, in the LPDDR5X generation of SOCAMM2, as I mentioned, we've announced a chipset that includes voltage regulation solutions and an SPD hub. As Luc, our CEO, talked about on our most recent earnings call, as we look forward to this, it's a very strategic position for us to have built with this chipset because as we move into LPDDR6 and future generations, we would expect our content opportunities to increase as they have as well in DDR. Things more like PMIC, away from voltage regulators. RCD-like chips for signal integrity for more complexity. Really, if we're going to make LPDDR work in the data center, we have to remember it was a memory technology that was built for mobile phones. It has fantastic characteristics around power consumption. It has some capacity and some reliability constraints that need to be brought up to bring this forward. We're very excited about helping the ecosystem maybe deepen the penetration. Your question before of how does that play out? We're hopeful that we become completely agnostic as we have been to LP versus DDR, just as we are to x86 and Arm going forward. Exciting times. Any question from the audience? We have less than two minutes left. One that probably we should touch on before concluding is the MRDIMM opportunity. Clearly, that's a whole new TAM layer that's coming up that you've quantified as a $multi-hundred million opportunity. How do you see that unfolding in terms of the timing? What does it solve in terms of problem given the current focus on performance? How well-positioned are you in that emerging opportunity? Yeah. MRDIMM from a technology standpoint uses the existing memory infrastructure, the memory slots, today's DRAM chips. With a new chipset from Rambus, gives us the ability to take those slots and double the capacity and the bandwidth on each module. A very exciting technology to solve some of the bottlenecks that we see in the data center and with some AI workloads specifically. We've talked about that being, as you said, a $multi-hundred million opportunity. It's really going to be driven by the penetration of the usage and the workloads there. In terms of timing, it's very platform dependent as we move forward. AMD's Venice platform will be important and then Intel's Diamond Rapids. We were very pleased to see AMD talk about the production of the Venice CPU, which should lead to Venice-based servers by the end of this year. We'll start to see some of the utilization and pickup of MRDIMM. Look forward to Intel being part of that ecosystem as well. I think they've made some comments about being a little bit later than that end of year entry point. Those will be the platforms that we look for that penetration and how successful MRDIMM will be at growing from here, Tristan. Great. Thank you very much for presenting. There's going to be a breakout in a few minutes at the mezzanine level, Astor 3 to 1B. Thanks again. Thank you.