Started? Great. Thank you. Welcome to the Rambus Fireside Chat. My name is Mark Lipacis. I'm the senior semiconductor analyst at Evercore ISI. Today, very happy to have Luc Seraphin, who is the CEO, and Sumeet Gagneja. Did I pronounce that correctly? Gagneja. Gagneja. Okay, who is the SVP and CFO. Sumeet, Luc, welcome, and thank you for joining us today. I think maybe if we could just start out with Sumeet. You're the new guy, right? What attracted you to Rambus, and what do you think as you have hit the ground? Yeah, no. Thanks, Mark Lipacis. Great question, and glad to be here. Super thrilled to be here. Rambus, as you know, we have three distinct business lines: product business, silicon IP business, and patent business, which generate a lot of cash. We're right in the middle of this compute revolution or renaissance of CPUs, whatever you want to call it, right? Our products definitely play in there. We have great gross margins, and we generate a lot of cash. That gives us ability to invest back into the business, and we'll talk about the capital allocation in a bit. I look at that set up, cyclical growth, very solid foundation. My experience is in the semiconductor industry. I've been in the semiconductor industry for 25 years, and especially my prior few roles very much into the data center. I understand the data center market, the workloads being shifting from training to inference to agentic and all that set up. That's what excites me a lot to be here. Mm-hmm. Got you. Okay. All right. Maybe if we just start out on this higher level of view. We talk to all the hyperscalers, and we get this idea that there's this demand for CPUs that's almost become insatiable. They explain to us that as we've gone from training to inferencing, we go from one CPU to four or eight GPUs going to inferencing one CPU to two GPUs, and then agentic could be one to one or two CPUs to one, maybe even four or even higher. We hear those kinds of numbers. I'm wondering, assuming that trajectory plays out, we're entering an agentic era, is there any reason that you should not be participating in that or your industry should not, the people you and your competitors should not be participating in that industry as CPUs grow? We will participate to that growth or that renaissance, as you call it. What we've seen is that the AI market has expanded from AI training to inference, agentic AI. The initial AI training workloads required the GPU HBM type of architecture associated with very high-performance CPUs. The software workload that you have in AI training is very different than the type of software you have to run in agentic AI. The training has to do with building the models. Once the models are being built, you have to use those models. As you said earlier, you also need to actually call on other resources that already exist in the cloud to complete those models and run inference. That creates that dynamic that you talked about the ratio between CPUs and GPUs changing in favor of CPUs. There's a very strong underlying growth vector there. Now, there are also tactical aspects associated with this. One is there's an insatiable need for more memory. Today, the memory industry is in a supply tightness type of situation. People who build this infrastructure for agentic AI need to put their hands on memories, and there needs to be supply of that memory. There's also the aspect of how fast the new CPU generations can roll out in the market. Again, agentic AI requires a lot of CPU capabilities, and these CPUs have to be available. I think the underlying growth vector is very strong. I think that's going to put constraint on the memory market, constraint on the CPU market in terms of availability of products. That's certainly a very strong tailwind for our business. Mm-hmm. You sell an RCD, and you sell other chips that go onto the DIMM. Are all of these CPUs that we're talking about, will they all have DIMMs? Yeah. For the vast majority of the CPUs, they are a DIMM-based architecture because this is where you have the highest capacity, have the highest reliability as well, and it's a known architecture. There's also a very large amount of software that has been developed for many, many years on this type of architecture that agentic AI, for example, is calling upon. All of this growth is going to create that demand for more DIMMs. The dynamic that we see is this agentic AI is requiring more CPU power, more core counts in the CPU. The more cores you have in the CPU, the more memory channels you need to feed those CPUs. What you see in this CPU rollout is people are adding memory channels as they move from generation to generation. For each one of these memory channels, we have the opportunity of adding one or two DIMMs, depending on the workload that our customers work on. Yes, that will create a very strong demand for DIMM. Our business is unit-based. As the more DIMMs are shipping out, the more revenue we have. It's more unit-based than ASP-based. Got you. Can you describe the competitive environment right now? It seems like you may have not done as well on the DDR4 cycle. It seems like you were first to market with DDR5. Is that fair? Then, as part of that, can you also help us understand it, there's different generations of DDR5 RCD chips and how does that play into your revenue trajectory and the competitive dynamics? Yeah. I'll start with the DDR4 question. When we entered DDR4, we started from scratch and there were already established vendors there. We actually had to fight our share through those generation. At the end of the DDR4 generation of products, we could reach about 25% market share. The market transition from DDR4 to DDR5 allowed us to get almost a step function in terms of share because we invested very early in the DDR5 chips. We engaged very early with the ecosystem partners, and that allowed us to secure a very strong footprint. The footprint typically is what translates into market share going down the road. Although in the DDR4 generation of products, we were at 25% share approximately, last year, we ended up the year at 45% share in DDR5. We established ourselves as the market leader in DDR5. In DDR5, you have these multiple generations. We had, in a very short period of time, gen 1, gen 2, which is in production today, gen 3 ramping in production, gen 4, gen 5, where we're shipping the early products. At every generation, it's the same type of challenges that we have to answer. Every generation has higher speed memories. At every generation, our memory suppliers have to requalify modules with new memories and a new RCD mostly because the speed has a direct impact on the RCD. The other chips on the modules, they can change at a lower cadence. The RCD and the memory at every generation become faster and faster, and we have to requalify. To requalify, again, we have to be first with very high-quality products engaging with our customers. When we went from gen 1 to gen 2 in DDR5, we continued to increase share. Gen 3 is ramping in the market and our footprint is very, very strong, as well as footprint in gen 4 and gen 5. We'll measure share at the end of the year as we do typically. Now we have 3 generations in play. As we move on, we continue to gain share, and this has to come from the very fact that we engage very early with very high-quality products. If I come back to the history of Rambus, this is what we decided to do as a company. We actually stopped a lot of activities that were not central to this mission. We focused on that mission. That was a good move, in retrospect because with AI, the market is accelerating. We had to produce a new product every other year, in DDR4. In DDR5, we have to roll out a new product every year, and we have to roll out the companion chips as well. The focus that the company has had on that has been really a good thing for us. I guess the way I normally think about this is gen 3, this is associated with Granite Rapids from Intel and Turin from AMD. Is that right? Correct. Okay. Right. What about gen 4? gen 4 is mostly Arm-based platforms. the CSPs. It's just an anomaly in the market. It's ramping in the market and our footprint is also very strong there. It just happens to be a large portion of the market is Arm-based from the CSPs. Got you. Gen 5, that should be Diamond Rapids and Venice? Correct. Is that right? Yeah, that's correct. Okay. Those products, I think the consensus view is that that's towards the end of this year. Is that? AMD announced that they were in production with Venice. The chip being in production doesn't necessarily mean that the servers are in production. The chip is in production. We believe the first servers are going to show up really towards the end of the year, at the very end of the year. Intel announced that their Diamond Rapids is going to be next year. It's a bit later than what we were hoping for. There is definitely momentum there. Again, if we zoom out, the market is in demand for higher core counts and higher memory bandwidth. The Venice platform and the Diamond Rapids Platforms offer that. It's just the timing is a little further to the right than we were hoping for. How do we think about the ASPs of your RCD chips as you get higher speeds? Do you get higher ASPs also? Is that reasonable, or do you deliver that extra for your customers? Yeah, the pricing dynamic in this market is very interesting, and we often have the questions, is it similar to the memory market because our customers are memory vendors? Fortunately or unfortunately, it's towards anyone's judgment here, we are not going through the memory cycles. We provide a chip that is defined by JEDEC, it's defined by the industry, and our two competitors provide the exact same chip. No one of us would risk increasing pricing- Because we would immediately lose share. Unless one of us is completely out of supply or has a major quality problem, then that would change the dynamic between the three. There's not the big swings that you see on the server or CPU market or on the memory market. We're more unit-based. in terms of growth. What we see, however, is at every generation of product that we offer to the market, like when we move from Gen3 to Gen4, from Gen4 to Gen5, there's naturally an uptick in pricing. Then these things go to full production, and this uptick in pricing decays over time. That dynamic has always existed in the market. The good news is that with the acceleration of rollout of platforms, I was talking about one platform every year now instead of one platform every other year, we have more of these upticks, too. Yeah. Thank you. In aggregate, we maintain our product margin between 60% and 65%. Whether the memory margins are 80% or whether they're negative. We kind of stay more stable there. Got you. Okay. Now, can you talk about where you are in the companion chip ramp? This is the idea where, along with the RCD, you're selling maybe a power management temperature sensor as a hub. If I understand correctly, this potentially doubles your content, silicon dollar content, if you get all of those. Is that the right way to? Yeah, that's correct. It doubles the silicon content if you move from a DDR4 module architecture to a DDR5 module architecture. When the industry moved to DDR5, they also moved some of the functions that were initially sitting on the motherboard onto the module. Okay. That's what happened. That's what explains the doubling of the time there. As you correctly say, these chips that have moved from the motherboard to the module during that transition are the temperature sensors, the two of them, an SPD hub and a power management chip. When the market transitioned from DDR4 to DDR5, we put the emphasis as a company on the RCD, because the RCD is the most complex chip on the module. As we were growing share from 0 to 25%, we could not afford missing that transition. It was very, very important for us to have that laser focus on the RCD transition. That explains why we went from 25% to 45%. Next most complex chip on that module is the PMIC. For the PMIC, our strategy has been to develop that know-how internally. Silently over time, we've built our own team, our own IP, and we've introduced PMIC, not in the first generation of DDR5, but in the follow-on generations. This PMIC, we have a steady growth of revenue. We're going to see that growth continue, especially as Gen3 enters the market. Gen5 is going to be another vector of growth on the PMIC. Our strategy, because we were not coming first, was to actually develop the most complex PMIC to leapfrog our competitors there, because people were asking, "What are you guys doing in PMIC? You've never had an experience there?" We leapfrogged with the most complex PMIC, and we introduced the PMIC in the most complex modules, and it's going to percolate down to the different modules. PMIC represents half of that doubling of the TAM, and the SPD hub and temperature sensor combine the other half. What kind of attach rates are you seeing on the latest generation right now? It's difficult to say because we're still in the qualification process. Okay. Mm-hmm. Our objective is exactly the same. Our objective is to be first with the latest product so that we maximize our footprint because our footprint just translates into market share. The other thing I would say about the PMIC as well is that as the modules become more and more complex and faster and faster, in the longer run, our customers are looking at suppliers that can supply the whole chipset because the interoperability between all of these chips is becoming more and more complex, and our customers expect us to work those interoperability questions before we actually supply the chips to them. Got you. Luc, we have a little bit of time left. I want you to talk about MRDIMM. What is it, and what's the opportunity? Okay. Where are we in the ramp? MRDIMM is a way of increasing bandwidth and capacity using the same server architecture that you have today. You have a processor, you have memory channels, and just imagine that you fully populate these memory channels. You need more memory because you're hungry for memory. The only way to go out is to add another processor so that you have more memory channels, but that's not economically the best way to do this. The idea is how do you use the same infrastructure, not add a processor, but double the capacity and double the bandwidth. That's where the idea of the MRDIMM came from. On an MRDIMM, you have a module where you have memory on both sides of the module, and you have a mechanism with a chipset to multiplex the access to this memory. Because processors have a higher potential on the bus in terms of speed than the memory have. If you have a mechanism where you can use the full speed of a memory bus, but multiplexing the memory access on the module side, then all of a sudden you have double the capacity and double the speed. Sorry for the technical stuff, but that's where it started. It resolves a lot of problems because without changing the architecture, all of a sudden you have all of these benefits. Okay. Now, in terms of timing, on the processor side, you need to have a memory controller that supports that function. The platforms that support that function are actually Venice and Diamond Rapids. The other platforms that are going to ramp in the market towards the end of the year and next year. The content on the module compared to a DDR5 module is four times. 4X. 4X. So- You had 2X from DDR4 to DDR5, and 4X from a DIMM DDR5 to an MRDIMM DDR5. 4X is because you have a more complex RCD on the chip, you have a more complex PMIC on the chip, so they're more expensive. You still have a hub, two temperature sensors, but you also have 10 new chips that did not exist on the standard DIMM we call data buffer chips that are here to do the multiplex between the memories. If you take all that chipset together, that's a content increase by a factor of four. Are you of the view that you start seeing revenues from this at the end of this year? Very little. Very little. Mm-hmm because of the ramp of the platforms. We do see revenue because we ship products to our customers and during their qualification, but we see there are more into 2027, 2028. Yeah. How would you describe the competitive environment for MRDIMM versus the RCD business? It's similar- It's similar. than what we have today. The only thing I would say is that, to the best of our knowledge today, only Renesas and us have the complete chipset. Montage has not announced any power management chip for that. Got you. Well, the red light is blinking, which means. Oh We ran out of time. Okay. Luc, thank you very much for joining us today and sharing your insights about Rambus. Thank you. Thank you, Mark