Ladies and gentlemen, welcome to the Synopsys Earnings Conference Call for the Third Quarter Fiscal Year 2024. At this time, all participants are in a listen-only mode. Later, we will conduct a question-and-answer session. If you would like to ask a question at that time, please press star one on your telephone keypad. To remove yourself from the queue, it is again star one. If you should require assistance during the call, please press star zero and an operator will assist you. Today's call will last one hour. As a reminder, today's call is being recorded. At this time, I would like to turn the conference over to Trey Campbell, Senior Vice President, Investor Relations. Please go ahead. Thank you, and good afternoon, everyone. With us today are Sassine Ghazi, President and CEO of Synopsys, and Shelagh Glaser, CFO. Before we begin, I'd like to remind everyone that during the course of this conference call, Synopsys will discuss forecasts, targets, and other forward-looking statements regarding the company and its financial results. While these statements represent our best current judgment about future results and performance as of today, our actual results are subject to many risks and uncertainties that could cause actual results to differ materially from what we expect. In addition to any risks that we highlight during this call, important factors that may affect our future results are described in our most recent SEC reports and today's earnings press release. In addition, we will refer to certain non-GAAP financial measures during the discussion. Reconciliations to their most directly comparable GAAP financial measures and supplemental financial information can be found in the earnings press release, financial supplement, and 8-K that were released earlier today. All of these items, plus the most recent investor presentation, are available on our website at www.synopsys.com. In addition, the prepared remarks will be posted on our website at the conclusion of the call. With that, let's turn the call over to Sassine. Good afternoon. We delivered excellent results in the third quarter, exceeding the midpoint of all our guidance targets while setting another quarterly revenue record. We positioned the company's portfolio with one strategic end in mind: maximizing the value that we deliver to customers in the era of pervasive intelligence. Our focus is on leading innovation in EDA and IP while deepening our differentiation in software-defined systems. Against this strategic backdrop, the Synopsys team continued its strong operational execution in the quarter, and commercial momentum remains robust. Revenue was up 13% year over year at the high end of our guided range. Non-GAAP operating margin was 40%, up 3.6 points year over year, and non-GAAP EPS was up 27% year over year and above our guidance range. We continue to be confident in our guidance for industry-leading double-digit revenue growth. Shelagh will discuss the financials in more detail. First, I'll give some context for our confidence, which is grounded in the continued strong execution of our Synopsys team and industry trends, reinforced by our customers and partners. Since becoming Synopsys CEO in January, I've traveled to eight countries, participating in more than 140 meetings with over 80 customers and partners, discussing their challenges and understanding their priorities. The message in every meeting is loud and clear: Synopsys is mission-critical to their innovation, which makes our business uniquely resilient. Our success is tied to technology innovation cycles, not end market dynamics. In this era of pervasive intelligence, technology innovation is only accelerating, fueled by the rise of artificial intelligence, silicon proliferation, and software-defined systems. The evidence is all around us. Our silicon customers are racing to design the many components necessary to optimize AI infrastructure. Remarkably, design cycles are contracting despite mounting complexity, and we help make this possible. This combination of pace and complexity equals good news for Synopsys. Artificial intelligence is driving incredible demand for high-performance computing in data centers and new AI-powered smartphones and PCs, which are poised for an exciting refresh thanks to silicon innovation. Bottom line, AI needs more and more complex silicon. That is good for Synopsys. Finally, silicon proliferation and AI chip innovation is driving the build-out of manufacturing capacity and accelerating the transition to new advanced nodes. Foundries count on our EDA and IP to enable each new process node. Again, good for Synopsys. These trends reinforce the resiliency of Synopsys business. Additionally, our customer set is expanding as more companies in more industries define and optimize system performance at the silicon level. As a leading silicon-to-systems design solutions company, Synopsys' opportunity has never been greater, and our planned acquisition of Ansys will expand our TAM and further our mission of empowering technology innovators everywhere. The future of technology R&D requires system design solutions with a deeper integration of electronics and physics. That's what we can provide with Ansys, and we're making good progress on closing this important transaction. The regulatory review is proceeding well. We are working cooperatively and constructively with the various regulatory agencies. We have completed all preliminary filings worldwide. Customers continue to express their overwhelming support, and we continue to expect the transaction to close in the first half of 2025. Let's move to segment business highlights, starting with Design Automation. Q3 Design Automation revenue was up 6% year over year versus a very strong prior Q3, as Synopsys Design Automation solutions are helping customers accelerate their innovation despite growing complexity. Growing systemic complexity has turbocharged the criticality of verification in chip design, and we offer the most complete portfolio of solutions in the industry. Our next-generation Verdi platform for advanced debug capabilities was adopted by a large U.S.-based GPU company and a large U.S. mobile SoC company, reducing failure debug from days to minutes. While our flagship verification tool, VCS, displaced competition at a large U.S. HPC customer, a large Chinese mobile customer, and a large Chinese hyperscaler. Our AI verification product, VSO.ai, is also ramping aggressively, demonstrating up to 10x faster turnaround time, double-digit increases in verification coverage, significant reductions in verification compute requirements, and better verification quality. A marquee U.S. GPU company deployed VSO.ai across multiple IPs, with turnaround time improvements of two to seven x and coverage improvements up to 33%. Our hardware-assisted verification business had an excellent quarter as customers upgraded from HAPS-100 to our ZeBu EP product line to leverage one hardware platform for both emulation and prototyping. In Q3, we saw a significant ZeBu hardware expansion at a large U.S. hyperscaler in a direct win versus competition. We also increased ZeBu adoption at a large European IP provider and two large U.S. HPC companies. Increasing demands for high-performance emulation with the opportunity for large capacity expansion were drivers in these wins. We also worked with several large U.S. systems and hyperscaler customers on successful software bring-up workloads with our HAPS product line. Physical verification was also a point of strength in the quarter. We continued to win new designs on ICV with twenty tape-outs in Q3. Four of these tape-outs were on TSMC N3 and one on IFS 18A, where engagements are increasing rapidly. Turning to analog design, where our competitive displacements continued in Q3. We now have more than thirty displacements for the year. This quarter, we completed analog full flow wins at a leading European Tier 1 supplier, a North American IP provider, and an Asian SoC vendor, and we displaced competition in analog simulation at two U.S. AI accelerator companies and a global analog chip company. Like in verification, our analog customers are looking to Synopsys as a scale multiplier to modernize their flows and unleash the power of AI to move to more advanced process nodes. Our Synopsys.ai engine for analog, ASO.ai, now has more than fifteen customers in evaluation. Transitioning to digital, where we continue to expand our leadership in digital EDA across advanced node design flows. Fusion Compiler delivered the world's first mobile SoC tape-out on Samsung's two nanometer GAA process this quarter, along with a number of customer first tape-outs at TSMC N2, N3E, and N5. Augmenting Fusion Compiler with our AI engine, DSO.ai, creates a powerhouse capability for customers. We are now seeing customer adoption spread to the automotive vertical, where a leading Asian automotive silicon company demonstrated 30% power reduction in a design with DSO.ai. Onto D esign IP, which delivered 32% revenue growth as the IP supplier of choice for leading HPC, AI, automotive, and mobile chips at advanced nodes. Driven by AI bandwidth requirements, hyperscalers are pushing consortiums to pull in specification timelines for interface protocols, creating faster innovation cycles and increased opportunity for us and our customers, and we are matching the space with our operational execution. In Q3, we announced the world's first PCIe 7.0 IP solution to enable fast and secure data transfers. We are also seeing increasing momentum in AI edge devices for mobile-optimized platforms. We secured two major smartphone customers on leading nodes to enable power-efficient mobile devices with Gen AI capabilities, while our ARC neural processing unit and DSP processors were adopted into five edge applications, including two new customers. Turning to multi-die, where we have an outstanding lineup of products in the IP and the EDA space for our customers. We continued to broaden our multi-die portfolio, launching 3DIO foundation IP, which is a specialized I/O for 3D multi-die integration. In EDA, 3D-IC Compiler momentum continued with the tape-out of multi-die design for an automotive application based on a CoWoS-R interposer and deployment at a major U.S. hyperscaler. We also announced Intel Foundry 18A, a reference flow for multi-die enabled by 3D-IC Compiler to accelerate multi-die designs at all stages, from silicon to systems. As the on-ramp for the world's foundry, we achieved silicon success on Samsung's SF2 and SF4X processes for a range of interface IP. We also demonstrated the industry's first HBM3, operating at 9.6 gigabits per second in TSMC's advanced three-nanometer processes, and partnered with GlobalFoundries to develop new memory compilers for the 22FDX process technology, targeting edge AI acceleration in automotive and industrial microcontrollers. A couple of closing comments before we transition to Shelagh's remarks. We are working through final closing conditions for the sale of our Software Integrity business, and continue to expect that we'll complete that transaction in the second half of 2024. And before closing, I want to recognize a monumental award to someone I deeply admire and I'm proud to call both a mentor and a friend, Synopsys Founder and Executive Chair, Aart de Geus. Aart was selected to receive the semiconductor industry's highest honor, the 2024 Robert Noyce Award. We look forward to celebrating his leadership and outstanding contributions to our industry at the awards ceremony in November. In summary, we have strong, continuing momentum across the business, supported by multiple secular growth drivers. We have a very resilient business model and are mission-critical to our customers' innovation. We are aligning our portfolio investment with the greatest return potential to accelerate our growth. Thank you to our employees for their passion and to our partners and customers for trusting us to ignite their future ingenuity. With that, I'll turn it over to Shelagh. Thank you, Sassine. We had an excellent Q3 with record revenue, and non-GAAP EPS was above our guidance range. We continue to execute well, which is a testament to our strong momentum across the business, leading technology that is mission-critical to our customers, and a resilient and stable business model. I'll now review our third quarter results, which are presented on a continuing operations basis. All comparisons are year over year, unless otherwise stated. We generated total revenue of $1.53 billion, up 13%, and at the high end of our guided range. Total GAAP costs and expenses were $1.17 billion. Total non-GAAP costs and expenses were $915 million, resulting in non-GAAP operating margin of 40%. GAAP earnings per share were $2.73. Non-GAAP earnings per share were $3.43, and above our guided range. Now on to our segment. Design Automation segment revenue was $1.06 billion, up 6% compared to a very strong Q3 a year ago. Design Automation adjusted operating margin was 41.5%. Design IP segment revenue was $463 million, up 32%, driven by strength in interface and foundation IP. Design IP adjusted operating margin was 36.7%. Operating cash flow, including discontinued operations, was $455 million for the quarter, and free cash flow, including discontinued operations, was $415 million. We ended the quarter with cash and short-term investments of approximately $2 billion. Now to guidance. Except for cash flow metrics, all targets are presented on a continuing operations basis. The full year targets for 2024 are revenue of $6.105-$6.135 billion, total GAAP costs and expenses between $4.58 and $4.60 billion, total non-GAAP costs and expenses between $3.76 and $3.77 billion, resulting in more than two points of non-GAAP operating margin improvement at the midpoint. Non-GAAP tax rate of 15%, GAAP earnings of $9.71 to $9.85 per share, non-GAAP earnings of $13.07 to $13.12 per share, cash flow from operations of approximately $1.3 billion, free cash flow of approximately $1.1 billion. Now to targets for the fourth quarter. Revenue between $1.614 billion and $1.644 billion, total GAAP costs and expenses between $1.21 billion and $1.23 billion, total non-GAAP costs and expenses between $1.03 billion and $1.04 billion, GAAP earnings of $2.25 to $2.39 per share, and non-GAAP earnings of $3.27 to $3.32 per share. Our press release and financial supplement include additional targets and GAAP to non-GAAP reconciliation. Consistent with prior years, we will provide additional comments and guidance for 2025 when we report next quarter. In conclusion, for 2024, we expect to achieve revenue growth of approximately 15%, non-GAAP operating margin improvement of more than two points, and approximately 24% non-GAAP EPS growth. We continue to see strong momentum in the business, reflecting our relentless execution and leadership position across our segments, mission-critical products to enable our customers' innovation, and a stable and resilient business model. With that, I'll turn it over to the operator for questions. Thank you. Before we begin the Q&A session, I would like to ask everyone to please limit yourself to one question and one brief follow-up to allow us to accommodate all participants. If you have additional questions, please reenter the queue and we'll take as many as time permits. As a reminder, to ask a question, please press star one on your telephone keypad, and to withdraw your question, simply press star one again. Your first question comes from the line of Harlan Sur with JP Morgan. Your line is open. Yeah, good afternoon. Thank you for taking my question, and great execution in the quarter. Sassine, as you mentioned, you know, leading-edge chip design activity continues to accelerate at the three nanometer, two nanometer nodes, especially around AI and accelerated compute by both merchant, but also a significant amount of custom ASIC chips that are ramping, that are coming to the market. But despite all of this, I mean, we are coming off of a pretty severe semiconductor downturn, and, you know, one of your large leading-edge customers has recently announced a significant amount of layoffs across the organization. They did also talk about driving better efficiencies around IP and EDA solutions. I interpreted this as they're going to do less of their own internal IP development, less of their own internal EDA software tool development, and potentially buy more merchant IP and more core EDA tools from Synopsys and maybe some of your other competitors. But I wanted to get your interpretation of this announcement and the near to midterm impact, if any, on your bookings, revenues, or market share momentum at this customer. Thank you, Harlan, for the question. I want to first comment on the first part of the statement you made, which is, you're right. It's such an exciting time to be in our industry, where our silicon customers are racing forward to deliver to the opportunities in the AI build-out, be it in the data center or on edge or on device, with the flavor of custom silicon, as well as system companies increasing their investment to differentiate along that stack from workload down to silicon. As far as our customer, Intel, that you're referring to, it's nothing new to Intel, by the way, that they started looking at external EDA and IP. That journey started in two thousand and seven. As you recall, most of their EDA were internally developed and IP, and it's been a journey over the last number of years to transition externally. Now, with this company transformation they're going through, this is an opportunity to look deeper at what's core, what's context, and looking seriously at efficiency and where to target their resources, where they can differentiate, or they can pick up from the ecosystem. We do believe that there will be an opportunity for further ecosystem leverage for both EDA and IP. As far as short to mid-term impact, we don't see much impact, actually. You know, as you know, our agreements are committed for long term, and we continue on delivering high value and impact to that customer, so we don't see much in terms of a negative impact in the short or mid-term. Great. Thank you for that. And, you know, just over the past ninety days, I mean, we've heard of many challenges your semiconductor customers are facing as they sort of push the boundaries- On leading-edge chip designs, right? And these challenges don't revolve around the actual performance of the chip itself. The, the issue is that once you drop these chips into advanced packaging solutions, for example, the power dissipation of these chips is generating a significant amount of heat, causing thermal, mechanical stress interactions with the packaging, causing a whole bunch of yield and reliability problems. And then on the flip side, we see more and more of your customers moving into the systems market, like AMD and their recent announcement to acquire ZT Systems, right? Where AMD, all of a sudden, is gonna be doing full-blown board server, rack-scale server designs. So it seems like this is exactly where having Ansys systems analysis solutions as a part of the portfolio becomes a big advantage for the team. But given all of these dynamics, I mean, is the support from customers around the Ansys acquisition continuing to build positive momentum? And then maybe in the interim, what is Synopsys doing to help customers with some of these chip package and systems-level challenges? I will start with a yes. Yes, on the continued support from customers, and actually not only silicon customers, silicon and system customers in support of the transaction for the exact same reason you highlighted. If you look at an advanced silicon in an advanced package, which has many dies, and those are very advanced chiplets, as you know- Mm-hmm. Mm-hmm ... each chiplet by itself is a very complex die to design. You put them all together, the challenge is no longer electronics. It's electronics plus all the other attributes you mentioned, from structural, fluid dynamics, to thermal. How do you design them during the architecture phase that you know once you go into packaging, manufacturing and packaging, it's going to work in the field? Now, you look at that as the chip system. That chip system to your AMD reference, is gonna sit on a board, is gonna sit in some sort of a, rack, and cluster of racks. How are you designing based on that workload and that complexity at the system level to determine, how to manage and design for the heat, to manage and design for what type of cooling you want to put, what type of power supplies do you need, et cetera, et cetera? And, we've been positioning our company, as you know, as a silicon-to-system design solution company, and I love the reference right now as I hear our customers talking about silicon to software to systems, which is exactly the solution and the partnership we're working with our customers on. Thank you. Thank you, Harlan. Your next question comes from the line of Vivek Arya with Bank of America. Your line is open. Thanks for taking my question. Sassine, at the end of day, you had suggested that core EDA over time the growth would go from 12%-14% from AI monetization. I'm curious, where is Synopsys in that journey? You know, what have been the early signs to drive this kind of acceleration in the business? Yes. So, Vivek, if you look back not too long ago, a best case outcome for traditional EDA was in the upper single digit. The reason we've been able to grow in the double digits and what we talked about, 12%-14%, is due to complexity of these systems, introduction of new technology to deal with that complexity, and we referenced AI. AI, from a journey point of view, we introduced first DSO.ai, which is the optimization engine on the digital portion of the design. As I mentioned in my prepared remarks, we have VSO.ai, which is in adoption and used by a number of customers at this stage and ramping. ASO.ai for analog. And the part I did not mention in this script itself, we talked about generative AI. We're using LLM for knowledge assistant and generation of a portion of the chip itself. So where are we in the monetization and maturity? With DSO.ai, we've been selling it for about four years now. We're capturing on average about 20% uplift from the baseline of that portion of the contract. For VSO.ai and is still in early stage. We're in an early monetization stage, but we don't have enough data point to share with you yet where is it? Will it be at the similar 20%, higher, lower? We're not there yet. ASO.ai, we're in an eval phase. What it means is in customer validation, and so it's similar to the generative AI. We have number of customers across five products we have currently that offer knowledge assistant at that stage. The 12%-14%, that's why we did not specify a timeframe, but what is absolutely clear is that value we are delivering will be able to, and the impact will be able to justify a monetization to support that 2% growth we communicated. Thanks, Sassine. And for my follow-up, kind of more near term. So EDA growth so far this fiscal year has been up about 9% or so. I understand last year was a tough year for the semiconductor industry, so you're probably feeling the effects, you know, of that. But what do you see going into next year conceptually? Do you think the seeds are being laid to help drive kind of a return back to your trend line growth in EDA, or is it too early to make that kind of conclusion? So for Design Automation, it's double-digit growth, and please measure it based on a trailing twelve months, not quarter over quarter, because, you know, sometimes you have, like, in this particular quarter, we had an outstanding Q3 2023. It does not mean that there is anything alarming, but the comparison quarter over quarter may be misleading. As you look at the trailing twelve months, we still feel strongly it's a double digit growth. And within Design Automation, the mix is changing. You know, you have the traditional ratable software. You have the hardware, which is more upfront, and then you have increasing portion becoming an FSA for the software, where customer wants that flexibility. For example, that's how they get access to cloud, is through that flexible spending account. That's why quarter-over-quarter comparison. I'll caution you around it. Look more at the trailing twelve months. Yeah, and I would just add that our TTM is 10%, and just as Sassine references, Q3 of last year was 23%, so 6% on top of 23% is obviously a tremendous growth. And Q3 of last year did include some expiring contracts, so obviously that's not recurring. Thank you. Thanks, Vivek. Your next question comes from the line of Joe Vruwink with Baird. Your line is open. Great. Thanks, everyone. IP with a very strong revenue growth in the quarter, but upfront products, even stronger growth in the quarter. I'm wondering if the latest generation of hardware-assisted verification is showing up, and that's the incremental contributor here. And relatedly, I've wanted to ask how order flow for the new hardware products compares, maybe if you compare it to the launch of EP1, a couple of years ago. Yes. So, on the hardware itself, we actually are selling our existing product. We introduced the EP system, which you need to think of it that sits between prototyping and emulation, which is a sweet use case. But we have a very competitive system in number of use cases. The use case that is sweet for Synopsys is software bring-up. Because of the performance our system is able to deliver, we're seeing actually a very nice adoption and pull in. Not pull in, like, a requirement from the customer to adopt those systems for software bring-up. The other use case that we identified a while back as an area we need to make sure we have a competitive solution is simulation acceleration. That's a use case that typically or historically Synopsys did not compete as strongly in that use case. We had couple wins in the quarter where customers are looking for the same hardware, same compile, that they can use it as a continuum from their prototyping to their emulation. That's why, Joe, you see the strong hardware momentum, and we don't see it slowing down given the complexity. The other upfront component I would add is IP, and we had an exceptionally strong IP quarter. To the extent that that IP is already available and a customer is ready to consume it, then that, that can happen pretty quickly. Okay. That, that's all very helpful. And then, the comment was made that commercial momentum remains robust. I'm wondering if that's just evident in backlog developments, if you can give an update there, and then any you may not like to give forward guidance on backlog, but how the pipeline looks into year end and maybe the initial part of next fiscal year. Thank you. Sure. Thanks, Joe. So backlog for the quarter was $7.9 billion. And to give you a reference on continuing operations last Q3, so Q3 of 2023, ex-SIG, that was $6.5 billion. So it's up very nicely year on year as we're continuing to race ahead to support the customers and all the complexity that they're dealing with. And, you know, that number does ebb and flow as we build and burn. It was relatively flat, though, quarter on quarter. Thanks, Joe. Thank you. Your next question comes from the line of Jason Celino with KeyBanc. Your line is open. Hey, thanks for taking my questions. Maybe my first one, just on the guidance for the year, it looks like you're narrowing the revenue range. As much as I'd like you to raise every quarter, I think we've already seen you raise two to three times this year, so I think we'll give you the pass. But curious if there were any areas that could have outperformed more or any areas downticked that offset some of the strength you did see? Curious there. Thanks. Well, Jason, as you said, we've raised several times this year, so the confidence of the Q3 results really allowed us to narrow our guidance to give 15% as the midpoint. I would say we're seeing, you know, that strength that Sassine is talking about in the industry, we're seeing that across our product line. Good engagement with customers really across the board as they accelerate their roadmaps to meet the robust AI demand. We did raise non-GAAP operating margin and non-GAAP EPS because, again, as Sassine talked about, you know, we're being very, very deliberate in our investment and our expenses and making sure that we're onboarding some of the things we're talking about doing with customers with AI and efficiency. So you saw us improve on both those metrics. Excellent. And then- Thanks, Jason. And then one quick one on China. It looks like it was down 8% in the quarter, but still up 8% for the year. Maybe just compared to last quarter, I guess, how are you feeling about the demand environment in that region? Yeah, that's why, Jason, at the beginning of the year, we talked about taking a pragmatic approach on China for two factors. One is the continued impact of the entity list, technology restrictions, and then the second is the macro environment in China. Now, all of that being said, we're still executing well in China, we're growing in China, and it's excellent to see when you look at the rest of the regions, we are performing incredibly well. So we continue to take a balanced approach on China, given those two factors. Perfect. Thanks, Sassine. You're welcome. Your next question comes from the line of Lee Simpson with Morgan Stanley. Your line is open. Great. Thanks for fitting me in, and great quarter, guys. Just wanted to ask an R&D question, if I could. So if you look at the numbers, it looks as though R&D was maybe slightly ahead of some people's expectations out there. And I think to be fair, there's been quite a build around new product updates, particularly hardware, but obviously around IP interfaces, maybe foundational IP as well. So I wondered if there was scope as we go through the end of this year and into next, for you to maybe flatten some of that R&D and just to help with that outperformance on the earnings line, or maybe the pace of product innovation is unlikely to let you do that. I just wanted to understand the balance between those two positions. Yeah. So certainly the pace of the industry and, you know, Sassine talked about, even the pace of new standards in IP is accelerating. So we almost have to be a step ahead of our customers, so continuing to invest in that is incredibly important. And then continuing to invest in building out both our hardware roadmap that you talked about, and then continuing to evolve our EDA capabilities is really top of our priority when we think about our investment. So I don't see R&D investment as an area of savings for us really anytime soon. Obviously, a lot of the benefits and efficiencies that we're driving there, we think about reinvesting those in building further product innovation. Great. Very clear. Maybe just as a follow-up, I wanted to ask an end market question, maybe on automotive. I think in the past, you've noted the growing focus in automotive and, and to see in some of your comments, seem to talk, call that out. You know, we are seeing a pivot to software-defined vehicles. We are seeing custom silicon, coming into view. So just trying to understand, you know, what proportion of growth would you say is sensible for us to assume over the next couple of years coming out of automotive, giving all the work, including some big microprocessors, going into the car? Thanks. Thank you, Lee, for the question. Automotive has been a very exciting segment, I want to say, over the last three to four years. And a couple of things were driving it, is the whole push towards delivering a smarter car, meaning more sophisticated silicon. And the same exact challenge at the system level that we talk about often in the hyperscaler context applies to automotive. Number of the automotive OEMs started. Some are already doing it, others are starting to consider building their own silicon. But what is absolutely happening, even if they're not building their own silicon, they're investing in the electronics system, meaning-... As they're architecting the system of the car, the electronic system of the car, and they're working with their Tier 1, Tier 2 suppliers, how do they communicate the spec of these chips that fits within, the software and the overall system requirements? For Synopsys, that's an opportunity where we sell what we call our virtualization solution, where we work with both the semiconductor companies to virtualize their chip, then we work with the automotive OEMs to define that architecture for the electronics based on these virtualization and virtual models. You can think of it as digital twin for electronics. That's contributing for an acceleration in the sales of some of our solutions and products that were not generated necessarily for the automotive market, but right now, that's a new market that are adopting these solutions. We do anticipate that that market will continue on growing, given those systems, those cars are gonna be more intelligent, more connected, which is a great opportunity. I cannot go further than that, Lee, in terms of what percentage of the overall growth, et cetera, et cetera, because that's not how we report, per se, by market segments. Understood. Thanks for the color, though. You're welcome. Your next question comes from the line of Ruben Roy of Stifel. Your line is open. Thank you. Sassine, hi, I wanted to go back to something you mentioned in your prepared remarks regarding design cycles contracting, and you mentioned that you know that's in the face of increasing chip complexity, and I think some of that at least to me seems like it's a relatively new development, and wondering how we should think about that as a maybe longer-term impact to your business. I'm thinking about this you know obviously there's AI and your tools you know helping with those design cycle accelerations. But are there other you know sort of areas that your customers are asking you for as they try to accelerate their designs? Really, I guess the longer-term question here is, it's happening at the leading edge, it's happening with the most complex designs, but do you think that is a, you know, trend that could, you know, sort of move across the systems and IC industry as you continue to develop, you know, on your end? Yeah, excellent question, Ruben. If you look back at the last, I don't know, two, three decades, the entire industry had a rhythm of the next product, and it was Moore's Law. That and not every company just moved with the latest Moore's Law offering. You move to it when you need from a performance, power, cost, et cetera, to move to it. Right now, when you look at number of customers, that they're talking about a reduced design cycle from what it used to be three years, eighteen months, down to possibly one year, it's. We cannot look at it as the traditional way of designing a chip. Those will be definitely multi-die systems with optionality in that advanced package to to target a new product in their roadmap to to serve a certain customer set. How fast do I see the rest of the market moving in that direction? Not too many customers can afford and have the skill and the market for them to move in that direction, because it's very complex. So it's both. The cycle time of the design is shrinking with a significantly increasing complexity. For us as an industry, that's great news, because from EDA for Design Automation at the chiplet level and the advanced package level, you need to use the latest technology with the AI capabilities, et cetera. For IP, it's requiring, as I mentioned as well in my prepared remarks, for these protocols to shrink from designing them over two, three-year set of requirements to a much shorter cycle and even customer adopting it before the spec is even finalized. Then, on the hardware, verification side, you need, of course, the ability to verify, validate all of this. Now, as you look at this whole, dynamic, while it's very exciting, we need to, wait and see how many customers will have the ability from resources, skills, investment to pace with that, acceleration. Your next question comes from the line of Charles Shi with Needham & Company. Your line is open. Hi, good afternoon. I have a question about China. I think at the beginning of the year, I think, for two reasons, right, restrictions and the macro, you were sort of expecting maybe China doesn't grow as fast as the corporate, which kind of implies maybe the percentage of China revenue probably gonna be lower. But you also said that dollar-wise, it's probably going to be, still going to be higher year-on-year for the full year. But the first of three quarters of the fiscal year looks like you may be ahead of that plan, meaning that the contribution-wise, it may actually get ahead of last year's 16% contribution from China, and then which would also imply actually, China may grow faster than the corporate. That there's a chance you actually can grow that faster than the corporate. Wonder what has changed, and I specifically the Q3 number from China is particularly strong, and related to that, but did you see any of the pull forward revenue from your Chinese customers for whatever reason, maybe for the fear of them getting banned by any of the new export controls? Mind if you provide some color there? So, I'll start with the last part of the question. No, we're not seeing anything unusual in terms of pull-ins or a different approach to engaging Synopsys. As far as what we communicated at the beginning of the year, still holds true. The reason you may see quarter over quarter growth in a specific region is, again, based on the mix of the products that we have. It may be a very strong hardware or IP quarter or more FSA pull down. That's why you see it. But nothing changed from what we communicated at the onset of the year. Your next question comes from the line of- Operator, I think you may have had a follow-up, Charles. Sorry? Oh, yes, I do have a follow-up. Yes. The other question, maybe for Shelagh, I think the non-GAAP expense looks like you are doing better. You are actually also ahead based on the numbers I can see, the July quarter, you did the $10 million better compared with what you planned as the total non-GAAP expense, and for the full year, $25 million less than what you expected. But wonder what's the change compared with three months ago? Is there anything like the timing of the hiring, et cetera? Because I did remember some of the OpEx growth into the year, and was for you to invest in some new opportunities, like in IP, like UCIe, EDA, et cetera. So what's driving the slightly lower OpEx expectation here? Thanks. Yeah. So we're continuing to invest. We talked about continuing to invest in building out the roadmap that we talked about in Investor Day, continuing to invest building out IP titles. And it's really all about making sure that we're being intentional about where our overall investment is. And so while we're investing in things, we're also driving efficiencies in the business as we implement AI for ourselves and we implement digital transformation. So I would just say we're being really prudent about our expense structure, but we are investing in the new product innovations. And then we also had some good news on interest and other. So both of those things, being really disciplined on our investments and then some good news on interest and other, is what's contributing to that upside. Your next question- Thank you for the question, Charles. Your next question comes from the line of Joshua Tilton with Wolfe Research. Your line is open. Hey, guys, thanks for sneaking me in here. I actually kind of want to follow up on two questions that were already asked. The first one is a question about Intel's comments, but I kind of just want to ask it very straightforward and very clear. And the question is: are there any changes in your forward growth expectations because of Intel's comments about, you know, laying people off, using IP more efficiently, using EDA vendors more efficiently? And if not, what gives you the confidence that there is no change going forward? Yes. So, when we engage customers, we're engaging on, programs that are, multi-quarters type of investments we need to make before we see the needle moving in terms of, impact on our business. That's why when you think of our business, as we refer to it, as resilient, because, it's a multi-year type of commitment. And, even if, Intel were to move, more IP, let's say, to Synopsys, these are things you will not see the impact in terms of, revenue, until it takes us the cycle to build that IP, deliver it back, et cetera, et cetera. So that's why short term, to mid-term, we don't see an impact in the positive or the negative, just simply because of the way we structured our engagement. And that's unique to Intel. This is just broadly. That's how we engage in IP build-out, and of course, EDA is more straightforward. Your next question comes from the line of Jay Vleeschhouwer with Griffin Securities. Your line is open. Thank you. So seeing, with respect to your own product development of AI/ML-branded products, one question I have is: how does the development process, or let's call it the intensity of development for AI products, differ, if at all, from your conventional product developments? In other words, how do you measure your own AI development productivity or your readiness for GA, of those products versus, conventional, EDA products? Relatedly, at DAC two months ago, there was an interesting panel discussion in which Shankar participated, regarding the evolution of EDA, AI, and ML products, and whether they remain separately branded products indefinitely, or whether inevitably they become subsumed as features within the core product. So maybe you can address all of that, and then my follow-up will be about custom. Thank you, Jay, for the question. Actually, it's a very good question. If you look back at the rhythm of product releases, let's call it the traditional EDA software were driven by foundry-specific PDK tuning, tweaking we needed to do in order to make sure that the customer who's on the leading edge with that process node have the right tool that is enabling all the features that foundry has, et cetera. So that's from a process technology. From a customer architecture point of view, we did not have to do much different from a customer to a different customer so they can use the same product, et cetera. With AI, let's call it, that sits inside the tool or around the tool, the optimization engine using AI that can accelerate the traditional engine of EDA, to some extent was very similar, where we just released it based on a release cycle of the product. So with DSO.ai, same release as Fusion Compiler, VSO, same as VCS, Verdi, et cetera. With generative AI, not only the pace of which model to use, which customer environment, and to accept these models, because they may have their own preference in which they want to use gen AI in the context of their own environment in which they're designing the chip. So it's becoming at a different pace of releasing this technology, as well as, I want to say, customer-specific for some of these engagements and releases. From the how to deal with it, so we're not having a special product for each customer, is from an engineering development point of view, what are the layers that we can have as common, and what's the layer that we can customize at a fast pace without throwing away the investment that we have at the infrastructure level? So that's what's changing in terms of there's the optimization AI, there's the gen AI, and the traditional EDA. As to the point that Shankar made, I agree. In our current engagement with customers, especially on the advanced, most complex chips, customers is not differentiating, does it-- will I use AI with Fusion Compiler or not? They will just use it. It's part of the expectation, is I need to use everything you give me in order to achieve my target. So as we start moving forward, will we keep thinking of AI in and around EDA as a separate or as part of the solution? You know, how we see it is absolutely will become an expected part of the solution. Okay. For my follow-up on custom, which you've now referred to the last several conference calls, what is your ambition for how large a business that can be? When we look at the industry data, things having to do with analog, mixed signal, layout, and analysis are roughly a mid-teens% of EDA, excluding IPs, in other words, mid-teens% of Design Automation. A lot of that obviously is skewed towards Cadence and Ansys, but would it be your ambition that your analog mixed- signal business could ultimately be about a mid-teens% of your Design Automation business, if not more? So, Jay, we see this as an opportunity on two fronts. When you think of analog, there are two portions of analog design that we offer solution for. One is the verification simulation of analog. And there, as you know, we have a fairly strong portfolio, and so does our competitor. Actually, they offer a very strong portfolio. Where we are a much smaller portion of the TAM is in the analog design environment. And in the analog design environment, these are the wins, per se, that we've been referring to in this earnings call, the previous earnings call, and they're driven by a discontinuity. And that discontinuity is those customers are dealing with the same challenge that we talked about for the traditional logic, digital type of customers, which is an increased complexity, faster cycle time for the design. So they are leveraging any new bells and whistles that the industry can offer, in this case, ASO.ai, and a more modernized approach to do an analog chip. So of course, we have an aspiration to grow into that TAM, and we're excited about the offering and our customers' interest. Thanks, Jay. Operator, let's go ahead and wrap up the call. Thank you, everyone. Thank you. Yeah, thank you. This concludes today's conference call. We thank you all for joining. You may now disconnect.